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Francisco V. Fernndez

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

39

Venues

6

Active years

1992–2025

Best venue rank

C

Where they publish

Papers

39 indexed papers, newest first.

YearVenueTitleAuthors
2025ISCASA Ring-Oscillator-based Odometer to Unveil the Actual IC Usage Time.F. de Los Santos-Prieto, Javier Diaz-Fortuny, Rafael Castro-Lpez, Elisenda Roca, Francisco V. Fernndez
2022ISCASA novel Physical Unclonable Function using RTN.Eros Camacho-Ruiz, Rafael Castro-Lpez, Elisenda Roca, Piedad Brox, Francisco V. Fernndez
2019DATENew method for the automated massive characterization of Bias Temperature Instability in CMOS transistors.Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-Lpez, Elisenda Roca Moreno, Javier Martn-Martnez, Rosana Rodrguez, Montserrat Nafra, Francisco V. Fernndez
2019DATEGeneration of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator.Antonio Toro-Fras, Pablo Saraza-Canflanca, Fbio Passos, Pablo Martn-Lloret, Rafael Castro-Lpez, Elisenda Roca, Javier Martn-Martnez, Rosana Rodrguez, Montserrat Nafra, Francisco V. Fernndez
2018IOLTSCMOS Characterization and Compact Modelling for Circuit Reliability Simulation.Javier Diaz-Fortuny, Javier Martn-Martnez, Rosana Rodrguez, Montserrat Nafra, Rafael Castro-Lpez, Elisenda Roca, Francisco V. Fernndez
2017CECAn algorithm for a class of real-life multi-objective optimization problems with a sweeping objective.Fbio Passos, Elisenda Roca, Rafael Castro-Lpez, Francisco V. Fernndez
2017ISCASA size-adaptive time-step algorithm for accurate simulation of aging in analog ICs.Pablo Martn-Lloret, Antonio Toro-Fras, Javier Martn-Martnez, Rafael Castro-Lpez, Elisenda Roca, Rosana Rodrguez, Montserrat Nafra, Francisco V. Fernndez
2016DATEAccurate synthesis of integrated RF passive components using surrogate models.Fbio Passos, Reinier Gonzalez-Echevarria, Elisenda Roca, Rafael Castro-Lpez, Francisco V. Fernndez
2015ISCASPhysical vs. surrogate models of passive RF devices.Fbio Passos, Mouna Kotti, Reinier Gonzalez-Echevarria, M. Helena Fino, Mourad Fakhfakh, Elisenda Roca, Rafael Castro-Lpez, Francisco V. Fernndez
2015ISCASDesign space exploration using hierarchical composition of performance models.Manuel Velasco-Jimenez, Rafael Castro-Lpez, Elisenda Roca, Francisco V. Fernndez
2014DATEModel based hierarchical optimization strategies for analog design automation.Engin Afacan, Simge Ay, Francisco V. Fernndez, Gnhan Dndar, I. Faik Baskaya
2014DATEImplementation issues in the hierarchical composition of performance models of analog circuits.Manuel Velasco-Jimenez, Rafael Castro-Lpez, Elisenda Roca, Francisco V. Fernndez
2013DATEArea optimization on fixed analog floorplans using convex area functions.Ahmet Unutulmaz, Gnhan Dndar, Francisco V. Fernndez
2012CECSelf-adaptive lower confidence bound: A new general and effective prescreening method for Gaussian Process surrogate model assisted evolutionary algorithms.Bo Liu, Qingfu Zhang, Francisco V. Fernndez, Georges G. E. Gielen
2010CECStopping criteria in evolutionary algorithms for multi-objective performance optimization of integrated inductors.Francisco V. Fernndez, Juan Esteban-Muller, Elisenda Roca, Rafael Castro-Lpez
2010CECAn enhanced MOEA/D-DE and its application to multiobjective analog cell sizing.Bo Liu, Francisco V. Fernndez, Qingfu Zhang, Murat Pak, Suha Sipahi, Georges G. E. Gielen
2010DATEAn accurate and efficient yield optimization method for analog circuits based on computing budget allocation and memetic search technique.Bo Liu, Francisco V. Fernndez, Georges G. E. Gielen
2009CECFuzzy selection based differential evolution algorithm for analog cell sizing capturing imprecise human intentions.Bo Liu, Francisco V. Fernndez, Georges G. E. Gielen
2009DATEAnalog layout synthesis - Recent advances in topological approaches.Helmut Grb, Florin Balasa, Rafael Castro-Lpez, Yu-Wei Chang, Francisco V. Fernndez, Mark Po-Hung Lin, Martin Strasser
2007ISCASA 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator.Ramon Tortosa Navas, Antonio Aceituno, Jos M. de la Rosa, ngel Rodrguez-Vzquez, Francisco V. Fernndez
2006ISCASReconfiguration of cascade Sigma Delta modulators for multistandard GSM/Bluetooth/UMTS/WLAN transceivers.Alonso Morgado, Roco del Ro, Jos M. de la Rosa, Fernando Medeiro, Maria Belen Prez-Verd, Francisco V. Fernndez, ngel Rodrguez-Vzquez
2006ISCASDesign of a 1.2-V cascade continuous-time Delta Sigma modulator for broadband telecommunications.Ramon Tortosa Navas, Jos M. de la Rosa, ngel Rodrguez-Vzquez, Francisco V. Fernndez
2005ISCASAnalysis of clock jitter error in multibit continuous-time ΣΔ modulators with NRZ feedback waveform.Ramon Tortosa Navas, Jos M. de la Rosa, ngel Rodrguez-Vzquez, Francisco V. Fernndez
2004DATEMATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time [Sigma, Delta] Modulators.Jess Ruiz-Amaya, Josep Llus de la Rosa, Fernando Medeiro, Francisco V. Fernndez, Roco del Ro, Maria Belen Prez-Verd, ngel Rodrguez-Vzquez
2004ISCASAn optimization-based tool for the high-level synthesis of discrete-time and continuous-time ΣΔ modulators in the Matlab/Simulink environment.Jess Ruiz-Amaya, Jos M. de la Rosa, Fernando Medeiro, Francisco V. Fernndez, Roco del Ro, Maria Belen Prez-Verd, ngel Rodrguez-Vzquez
2003DATEBehavioural Modelling and Simulation of SigmaDelta Modulators Using Hardware Description Languages.Rafael Castro-Lpez, Francisco V. Fernndez, Fernando Medeiro, ngel Rodrguez-Vzquez
2003FDLDescription Languages and Tools for the Behavioural Simulation of SD Modulators: a Comparative Survey.Rafael Castro-Lpez, Jos M. de la Rosa, R. Romay, Roco del Ro, Fernando Medeiro, Francisco V. Fernndez
2003ISCASAccurate VHDL-based simulation of Sigma-Delta modulators.Rafael Castro-Lpez, Francisco V. Fernndez, Fernando Medeiro, ngel Rodrguez-Vzquez
2001DATERetargeting of mixed-signal blocks for SoCs.Rafael Castro-Lpez, Francisco V. Fernndez, Manuel Delgado-Restituto, ngel Rodrguez-Vzquez
2000DATEA Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits.Oscar Guerra, Elisenda Roca, Francisco V. Fernndez, ngel Rodrguez-Vzquez
2000DATEXFridge: A SPICE-Based, Portable, User-Friendly Cell-Level Sizing Tool.F. M. Prez-Montes, Fernando Medeiro, Rafael Domnguez-Castro, Francisco V. Fernndez, ngel Rodrguez-Vzquez
2000ISCASAn error-controlled methodology for approximate hierarchical symbolic analysis.Oscar Guerra, Juan D. Rodrguez-Garca, Elisenda Roca, Francisco V. Fernndez, ngel Rodrguez-Vzquez
1999DATEAn Accurate Error Control Mechanism for Simplification Before Generation Algorihms.Oscar Guerra, Juan D. Rodrguez-Garca, Elisenda Roca, Francisco V. Fernndez, ngel Rodrguez-Vzquez
1997DATEAn algorithm for numerical reference generation in symbolic analysis of large analog circuits.Ignacio Garcia-Vargas, Mariano Galan, Francisco V. Fernndez, ngel Rodrguez-Vzquez
1995ISCASA Tool for Fast Mismatch Analysis of Analog Circuits.R. Rodriguez-Macias, Francisco V. Fernndez, ngel Rodrguez-Vzquez, Jos L. Huertas
1994ICCADA statistical optimization-based approach for automated sizing of analog cells.Fernando Medeiro, Francisco V. Fernndez, Rafael Domnguez-Castro, ngel Rodrguez-Vzquez
1994ISCASPleasures, Perils and Pitfalls of Symbolic Analysis.Francisco V. Fernndez, Georges G. E. Gielen, Lawrence Huelsman, Agnieszka Konczykowska, Stefano Manetti, Willy M. C. Sansen, Jir Vlach
1994ISCASSymbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation.Francisco V. Fernndez, Piet Wambacq, Georges G. E. Gielen, ngel Rodrguez-Vzquez, Willy M. C. Sansen
1992ICCADAccuate simplification of large symbolic formulae.Francisco V. Fernndez, ngel Rodrguez-Vzquez, J. D. Martn, Jos L. Huertas