Frank Callaly
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
2011–2023
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | RSP | HDLGen-ChatGPT Case Study: RISC-V Processor VHDL and Verilog Model - Testbench and EDA Project Generation. | Fearghal Morgan, John Patrick Byrne, Abishek Bupathi, Roshan George, Muhammad Adnan Elahi, Frank Callaly, Sean Kelly, Declan O'Loughlin |
| 2018 | FPL | viciLogic2.0 Online Learning and Prototyping Using PYNQ. | Fearghal Morgan, Declan O'Loughlin, Jeremy Audiger, Yohan Boyer, Frank Callaly |
| 2018 | RSP | Vicilogic 2.0: Online Learning and Prototyping of Digital Systems Using PYNQ-Z1/-Z2 SoC. | Fearghal Morgan, Declan O'Loughlin, Jeremy Audiger, Yohan Boyer, Niall Timlin-Canning, Krzysztof Kepa, Seamus Cawley, Ian Gallivan, Lszl Bak, Frank Callaly |
| 2011 | FPL | Remote FPGA Lab with Interactive Control and Visualisation Interface. | Fearghal Morgan, Seamus Cawley, Frank Callaly, Shane Agnew, Patrick Rocke, Martin O'Halloran, Nina Drozd, Krzysztof Kepa, Brian McGinley |