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Fu-Chiung Cheng

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

2

Active years

1995–2007

Best venue rank

C

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2007VLSIDDetection and Generation of Self-Timed Pipelines from High Level Specifications.Fu-Chiung Cheng, Shu-Ming Chang, Chi-Huam Shieh
2006ICCDDesign and Implementation of Software Objects in Hardware.Fu-Chiung Cheng, Hung-Chi Wu
2005ICCDAutomatic Synthesis of Composable Sequential Quantum Boolean Circuits.Li-Kai Chang, Fu-Chiung Cheng
2001ICCDEfficient Systematic Error-correcting Codes for Semi-Delay-Insensitive Data Transmission.Fu-Chiung Cheng, Shuen-Long Ho
2000VLSIDSpecification and Design of a Quasi-Delay-Insensitive Java Card.Fu-Chiung Cheng, Chuin-Ren Wang
1998ICCDPractical design and performance evaluation of completion detection circuits.Fu-Chiung Cheng
1997ICCDSynthesizing Iterative Functions into Delay-Insensitive Tree Circuits.Fu-Chiung Cheng
1997VLSIDDelay-Insensitive Carry-Lookahead Adders.Fu-Chiung Cheng, Stephen H. Unger, Michael Theobald, Wen-Chung Cho
1995VLSIDSynthesis of asynchronous circuits for stuck-at and robust path delay fault testability.Steven M. Nowick, Niraj K. Jha, Fu-Chiung Cheng