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Fuminori Kobayashi

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

5

Active years

1987–2022

Best venue rank

C

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2022ISCASAnalog Correlator by a Dynamically-Reconfigured Switched-Capacitor Circuit.Fuminori Kobayashi
2007ASPDACA 0.35um CMOS 1, 632-gate-count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI.Minoru Watanabe, Fuminori Kobayashi
2007ISCASHolographic memory reconfigurable VLSI.Minoru Watanabe, Fuminori Kobayashi
2006ASPDACA 476-gate-count dynamic optically reconfigurable gate array VLSI chip in a standard 0.35 micrometer CMOS technology.Minoru Watanabe, Fuminori Kobayashi
2006FPLA Reconfiguration Speed Adjustment Technique for ORGAs with a Holographic Memory.Minoru Watanabe, Fuminori Kobayashi
2005ISCASA 16, 000-gate-count optically reconfigurable gate array in a standard 0.35m CMOS technology.Minoru Watanabe, Fuminori Kobayashi
2004FPLA High-Density Optically Reconfigurable Gate Array Using Dynamic Method.Minoru Watanabe, Fuminori Kobayashi
2004VLSIDAn Optically Differential Reconfigurable Gate Array with a partial reconfiguration optical system and its power consumption estimation.Minoru Watanabe, Fuminori Kobayashi
1995ISCASA Digital PLL with Finite Impulse Responses.Fuminori Kobayashi, Masayuki Haratsu
1987ICASSPTime-varying signals analysis using squared analytic signals.Fuminori Kobayashi, Hiroshi Suzuki