| 2024 | ISCAS | AnSpiCS-Net: Reconfigurable Network-on-Chip for Analog Spiking Recurrent Neural Networks. | Manu Rathore, Garrett S. Rose |
| 2024 | ISCAS | HfO2-Based Synaptic Spiking Neural Network Evaluation to Optimize Design and Testing Cost. | SNB Tushar, Hritom Das, Garrett S. Rose |
| 2024 | VLSID | SpiCS-Net: Circuit Switched Network on Chip for Area-Efficient Spiking Recurrent Neural Networks. | Manu Rathore, Garrett S. Rose |
| 2023 | ACSSC | Evaluating Neuron Models through Application-Hardware Co-Design. | Catherine D. Schuman, Hritom Das, James S. Plank, Ahmedullah Aziz, Garrett S. Rose |
| 2022 | ISCAS | Programmable Refractory Period Implementations in a Mixed-Signal Integrate-And-Fire Neuron. | Nishith N. Chakraborty, Garrett S. Rose, Min H. Kao |
| 2020 | IJCNN | GRANT: Ground-Roaming Autonomous Neuromorphic Targeter. | Jonathan D. Ambrose, Adam Z. Foshie, Mark E. Dean, James S. Plank, Garrett S. Rose, J. Parker Mitchell, Catherine D. Schuman, Grant Bruer |
| 2020 | IJCNN | Automated Design of Neuromorphic Networks for Scientific Applications at the Edge. | Catherine D. Schuman, J. Parker Mitchell, Maryam Parsa, James S. Plank, Samuel D. Brown, Garrett S. Rose, Robert M. Patton, Thomas E. Potok |
| 2020 | IJCNN | Scaled-up Neuromorphic Array Communications Controller (SNACC) for Large-scale Neural Networks. | Aaron R. Young, Adam Z. Foshie, Mark E. Dean, James S. Plank, Garrett S. Rose, J. Parker Mitchell, Catherine D. Schuman |
| 2020 | ISCAS | Circuit Techniques for Efficient Implementation of Memristor Based Reservoir Computing. | Sagarvarma Sayyaparaju, Mst Shamim Ara Shawkat, Md Musabbir Adnan, Garrett S. Rose |
| 2018 | IJCNN | Neuromorphic Array Communications Controller to Support Large-Scale Neural Networks. | Aaron R. Young, Mark E. Dean, James S. Plank, Garrett S. Rose, Catherine D. Schuman |
| 2018 | ISCAS | A Novel Scan-In Scheme for CMOS/ReRAM Programmable Logic Circuits. | Md Musabbir Adnan, Sherif Amer, Garrett S. Rose |
| 2018 | ISCAS | High-Level Simulation for Spiking Neuromorphic Computing Systems. | Nicholas D. Skuda, Catherine D. Schuman, Gangotree Chakma, James S. Plank, Garrett S. Rose |
| 2017 | ISCAS | A practical hafnium-oxide memristor model suitable for circuit design and simulation. | Sherif Amer, Sagarvarma Sayyaparaju, Garrett S. Rose, Karsten Beckmann, Nathaniel C. Cady |
| 2016 | IJCNN | An Application Development Platform for neuromorphic computing. | Mark E. Dean, Jason Chan, Christopher Daffron, Adam Disney, John Reynolds, Garrett S. Rose, James S. Plank, J. Douglas Birdwell, Catherine D. Schuman |
| 2016 | SC | A Study of Complex Deep Learning Networks on High Performance, Neuromorphic, and Quantum Computers. | Thomas E. Potok, Catherine D. Schuman, Steven R. Young, Robert M. Patton, Federico M. Spedalieri, Jeremy Liu, Ke-Thia Yao, Garrett S. Rose, Gangotree Chakma |
| 2015 | DAC | Performance analysis of a memristive crossbar PUF design. | Garrett S. Rose, Chauncey A. Meade |
| 2013 | ASPDAC | Hardware security strategies exploiting nanoelectronic circuits. | Garrett S. Rose, Jeyavijayan Rajendran, Nathan R. McDonald, Ramesh Karri, Miodrag Potkonjak, Bryant T. Wysocki |
| 2013 | ICCAD | A write-time based memristive PUF for hardware security applications. | Garrett S. Rose, Nathan R. McDonald, Lok-Kwong Yan, Bryant T. Wysocki |
| 2012 | DAC | Hardware realization of BSB recall function using memristor crossbar arrays. | Miao Hu, Hai Li, Qing Wu, Garrett S. Rose |
| 2012 | IJCNN | Memristor crossbar based hardware realization of BSB recall function. | Miao Hu, Hai Li, Qing Wu, Garrett S. Rose, Yiran Chen |
| 2011 | IJCNN | A low-power memristive neuromorphic circuit utilizing a global/local training mechanism. | Garrett S. Rose, Robinson E. Pino, Qing Wu |
| 2011 | ISCAS | A hierarchical 3-D floorplanning algorithm for many-core CMP networks. | Sachhidh Kannan, Garrett S. Rose |
| 2011 | ISCAS | A read-monitored write circuit for 1T1M multi-level memristor memories. | Harika Manem, Garrett S. Rose |
| 2011 | ISCAS | Parallel memristors: Improving variation tolerance in memristive digital circuits. | Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose |
| 2011 | ISCAS | Exploiting memristance for low-energy neuromorphic computing hardware. | Garrett S. Rose, Robinson E. Pino, Qing Wu |
| 2011 | VLSID | An Approach to Tolerate Process Related Variations in Memristor-Based Applications. | Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Garrett S. Rose |
| 2010 | ISCAS | Overview: Memristive devices, circuits and systems. | Garrett S. Rose |
| 2006 | FPGA | A programmable majority logic array using molecular scale electronics. | Garrett S. Rose, Mircea R. Stan |
| 2006 | VLSID | Hybrid CMOS/Molecular Electronic Circuits. | Mircea R. Stan, Garrett S. Rose, Matthew M. Ziegler |