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Gary Grise

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

3

Active years

2006–2010

Best venue rank

A*

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2010ITCLow cost at-speed testing using On-Product Clock Generation compatible with test compression.Brion L. Keller, Krishna Chakravadhanula, Brian Foutz, Vivek Chickermane, R. Malneedi, Thomas J. Snethen, Vikram Iyengar, David E. Lackey, Gary Grise
2007ITCAutomated handling of programmable on-product clock generation (OPCG) circuitry for delay test vector generation.Anis Uzzaman, Bibo Li, Thomas J. Snethen, Brion L. Keller, Gary Grise
2007VTSAn Integrated Framework for At-Speed and ATE-Driven Delay Test of Contract-Manufactured ASICs.Vikram Iyengar, Kenneth Pichamuthu, Andrew Ferko, Frank Woytowich, David E. Lackey, Gary Grise, Mark Taylor, Mike Degregorio, Steven F. Oakland
2006DACA flexible and scalable methodology for GHz-speed structural test.Vikram Iyengar, Gary Grise, Mark Taylor
2006ITCAt-Speed Structural Test For High-Performance ASICs.Vikram Iyengar, Toshihiko Yokota, Kazuhiro Yamada, Theo Anemikos, Bob Bassett, Mike Degregorio, Rudy Farmer, Gary Grise, Mark Johnson, Dave Milton, Mark Taylor, Frank Woytowich