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Gordon R. Chiu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

4

Venues

3

Active years

2006–2018

Best venue rank

A

Where they publish

Papers

4 indexed papers, newest first.

YearVenueTitleAuthors
2018FPLDLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration.Mohamed S. Abdelfattah, David Han, Andrew Bitar, Roberto DiCecco, Shane O'Connell, Nitika Shanker, Joseph Chu, Ian Prins, Joshua Fender, Andrew C. Ling, Gordon R. Chiu
2017FPGAAn OpenCL™ Deep Learning Accelerator on Arria 10.Utku Aydonat, Shane O'Connell, Davor Capalija, Andrew C. Ling, Gordon R. Chiu
2016FPGAThe Stratix™ 10 Highly Pipelined FPGA Architecture.David M. Lewis, Gordon R. Chiu, Jeffrey Chromczak, David R. Galloway, Ben Gamsa, Valavan Manohararajah, Ian Milton, Tim Vanderhoek, John Van Dyken
2006ICCADMapping arbitrary logic functions into synchronous embedded memories for area reduction on FPGAs.Gordon R. Chiu, Deshanand P. Singh, Valavan Manohararajah, Stephen Dean Brown