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Graham Schelle

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

6

Active years

2003–2010

Best venue rank

A*

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2010FPGAIntel nehalem processor core made FPGA synthesizable.Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Xiang Zou, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang
2008FPLExploring FPGA network on chip implementations across various application and network loads.Graham Schelle, Dirk Grunwald
2007FCCMAbstracting Modern FCCMs To Provide a Single Interface to Architectural Resources.Graham Schelle, Dirk Grunwald
2007FPLA Software Defined Radio Application Utilizing Modern FPGAs and NoC Interconnects.Graham Schelle, Jeff Fifield, Dirk Grunwald
2006HPCAExploiting parallelism and structure to accelerate the simulation of chip multi-processors.David A. Penry, Daniel Fay, David Hodgdon, Ryan Wells, Graham Schelle, David I. August, Dan Connors
2005FPGACUSP: a modular framework for high speed network applications on FPGAs.Graham Schelle, Dirk Grunwald
2004DACMapping a domain specific language to a platform FPGA.Chidamber Kulkarni, Gordon J. Brebner, Graham Schelle
2004FPLAutomated Speculation and Parallelism in High Performance Network Applications.Graham Schelle, Dirk Grunwald
2003HotOSPrivacy-Aware Location Sensor Networks.Marco Gruteser, Graham Schelle, Ashish Jain, Richard Han, Dirk Grunwald