Gran Eggers
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2000–2002
Best venue rank
B
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2002 | FPL | A Reconfigurable Processor Architecture. | Adronis Niyonkuru, Gran Eggers, Hans Christoph Zeidler |
| 2000 | RSP | Efficient Clock-Cycle Precise Simulation at Architecture Level in C++. | Gran Eggers, Hans Christoph Zeidler |