Gran Jerke
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
4
Active years
2003–2018
Best venue rank
B
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | ICCAD | The need and opportunities of electromigration-aware integrated circuit design. | Steve Bigalke, Jens Lienig, Gran Jerke, Jrgen Scheible, Roland Jancke |
| 2015 | ASPDAC | Physical verification flow for hierarchical analog ic design constraints. | Volker Meyer zu Bexten, Markus Tristl, Gran Jerke, Hartmut Marquardt, Dina Medhat |
| 2012 | DATE | Hierarchical propagation of geometric constraints for full-custom physical design of ICs. | Maximilian Mittag, Andreas Krinke, Gran Jerke, Wolfgang Rosenstiel |
| 2008 | DATE | On the Verification of High-Order Constraint Compliance in IC Design. | Jan B. Freuer, Gran Jerke, Joachim Gerlach, Wolfgang Nebel |
| 2005 | VLSID | Electromigration-Aware Physical Design of Integrated Circuits. | Jens Lienig, Gran Jerke |
| 2003 | ASPDAC | Current-driven wire planning for electromigration avoidance in analog circuits. | Jens Lienig, Gran Jerke |