| 2026 | DATE | RAPID: Accelerating Point Cloud Diffusion Models via Space-Aware Mix-Precision Quantization. | Qichu Sun, Yanan Zhu, Linxi Lu, Haishuang Fan, Jingya Wu, Huawei Li, Xiaowei Li, Guihai Yan |
| 2025 | ASPDAC | APTO: Accelerating Serialization-Based Point Cloud Transformers with Position-Aware Pruning. | Qichu Sun, Rui Meng, Haishuang Fan, Fangqiang Ding, Linxi Lu, Jingya Wu, Xiaowei Li, Guihai Yan |
| 2025 | ICCAD | SNO: Securing Network Function Offloading on FPGA-based SmartNICs in Untrusted Clouds. | Yunkun Liao, Jingya Wu, Wenyan Lu, Hang Lu, Xiaowei Li, Guihai Yan |
| 2025 | ICCD | Flame: A Multiplier-Free LLM Accelerator with Dynamic Block Floating Point. | Ao Lyu, Haishuang Fan, Guihai Yan |
| 2025 | ICCD | Hermes: Accelerating Packet Processing in DPU with Neural Network. | Rui Meng, Xinyu Chen, Hanyue Lin, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan |
| 2024 | CLOUD | TianMen: a DPU-based storage network offloading structure for disaggregated datacenters. | Weiyue Zhao, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan |
| 2024 | DAC | Co-Via: A Video Frame Interpolation Accelerator Exploiting Codec Information Reuse. | Haishuang Fan, Qichu Sun, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan |
| 2024 | DAC | PHD: Parallel Huffman Decoder on FPGA for Extreme Performance and Energy Efficiency. | Yunkun Liao, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan |
| 2024 | EuroPar | Athena: Add More Intelligence to RMT-Based Network Data Plane with Low-Bit Quantization. | Yunkun Liao, Hanyue Lin, Jingya Wu, Wenyan Lu, Huawei Li, Xiaowei Li, Guihai Yan |
| 2024 | EuroPar | Efficient RNIC Cache Side-Channel Attack Detection Through DPU-Driven Architecture. | Yunkun Liao, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan |
| 2023 | FPL | Co-ViSu: a Video Super-Resolution Accelerator Exploiting Codec Information Reuse. | Haishuang Fan, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan |
| 2023 | ICPP | BitColor: Accelerating Large-Scale Graph Coloring on FPGA with Parallel Bit-Wise Engines. | Haishuang Fan, Ming Li, Jingya Wu, Wenyan Lu, Xiaowei Li, Guihai Yan |
| 2022 | HPCA | Using Psychophysics to Guide Power Adaptation for Input Methods on Mobile Architectures. | Xueliang Li, Shicong Hong, Junyang Chen, Guihai Yan, Kaishun Wu |
| 2022 | ICDE | DOE: Database Offloading Engine for Accelerating SQL Processing. | Wenyan Lu, Yan Chen, Jingya Wu, Yu Zhang, Xiaowei Li, Guihai Yan |
| 2019 | ASPDAC | TNPU: an efficient accelerator architecture for training convolutional neural networks. | Jiajun Li, Guihai Yan, Wenyan Lu, Shuhao Jiang, Shijun Gong, Jingya Wu, Junchao Yan, Xiaowei Li |
| 2019 | DAC | ShuntFlow: An Efficient and Scalable Dataflow Accelerator Architecture for Streaming Applications. | Shijun Gong, Jiajun Li, Wenyan Lu, Guihai Yan, Xiaowei Li |
| 2018 | DATE | CCR: A concise convolution rule for sparse neural network accelerators. | Jiajun Li, Guihai Yan, Wenyan Lu, Shuhao Jiang, Shijun Gong, Jingya Wu, Xiaowei Li |
| 2018 | DATE | SmartShuttle: Optimizing off-chip memory accesses for deep learning accelerators. | Jiajun Li, Guihai Yan, Wenyan Lu, Shuhao Jiang, Shijun Gong, Jingya Wu, Xiaowei Li |
| 2018 | ICCAD | Tetris: re-architecting convolutional neural network computation for machine learning accelerators. | Hang Lu, Xin Wei, Ning Lin, Guihai Yan, Xiaowei Li |
| 2018 | ISLPED | AxTrain: Hardware-Oriented Neural Network Training for Approximate Inference. | Xin He, Liu Ke, Wenyan Lu, Guihai Yan, Xuan Zhang |
| 2017 | ASPDAC | ApproxEye: Enabling approximate computation reuse for microrobotic computer vision. | Xin He, Guihai Yan, Faqiang Sun, Yinhe Han, Xiaowei Li |
| 2017 | HPCA | FlexFlow: A Flexible Dataflow Accelerator Architecture for Convolutional Neural Networks. | Wenyan Lu, Guihai Yan, Jiajun Li, Shijun Gong, Yinhe Han, Xiaowei Li |
| 2016 | ASPDAC | ACR: Enabling computation reuse for approximate computing. | Xin He, Guihai Yan, Yinhe Han, Xiaowei Li |
| 2015 | ASPDAC | ShuttleNoC: Boosting on-chip communication efficiency by enabling localized power adaptation. | Hang Lu, Guihai Yan, Yinhe Han, Ying Wang, Xiaowei Li |
| 2014 | ASPDAC | Amphisbaena: Modeling two orthogonal ways to hunt on heterogeneous many-cores. | Jun Ma, Guihai Yan, Yinhe Han, Xiaowei Li |
| 2014 | DATE | SuperRange: Wide operational range power delivery design for both STV and NTV computing. | Xin He, Guihai Yan, Yinhe Han, Xiaowei Li |
| 2013 | DAC | RISO: relaxed network-on-chip isolation for cloud processors. | Hang Lu, Guihai Yan, Yinhe Han, Binzhang Fu, Xiaowei Li |
| 2013 | DATE | Orchestrator: a low-cost solution to reduce voltage emergencies for multi-threaded applications. | Xing Hu, Guihai Yan, Yu Hu, Xiaowei Li |
| 2013 | DATE | SmartCap: user experience-oriented power adaptation for smartphone's application processor. | Xueliang Li, Guihai Yan, Yinhe Han, Xiaowei Li |
| 2012 | HPCA | AgileRegulator: A hybrid voltage regulator scheme redeeming dark silicon for power efficiency in a multicore architecture. | Guihai Yan, Yingmin Li, Yinhe Han, Xiaowei Li, Minyi Guo, Xiaoyao Liang |
| 2011 | ITC | Online timing variation tolerance for digital integrated circuits. | Guihai Yan, Xiaowei Li |
| 2010 | ISCA | Leveraging the core-level complementary effects of PVT variations to reduce timing emergencies in multi-core processors. | Guihai Yan, Xiaoyao Liang, Yinhe Han, Xiaowei Li |
| 2009 | DATE | A unified online Fault Detection scheme via checking of Stability Violation. | Guihai Yan, Yinhe Han, Xiaowei Li |
| 2009 | ISLPED | MicroFix: exploiting path-grained timing adaptability for improving power-performance efficiency. | Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li |
| 2009 | PRDC | Variation-Aware Scheduling for Chip Multiprocessors with Thread Level Redundancy. | Jianbo Dong, Lei Zhang, Yinhe Han, Guihai Yan, Xiaowei Li |