Guillaume Prenat
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
14
Venues
6
Active years
2004–2024
Best venue rank
A*
Where they publish
Papers
14 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | DATE | Enhancing Reliability of Neural Networks at the Edge: Inverted Normalization with Stochastic Affine Transformations. | Soyed Tuhin Ahmed, Kamal Danouchi, Guillaume Prenat, Lorena Anghel, Mehdi B. Tahoori |
| 2024 | DATE | NeuSpin: Design of a Reliable Edge Neuromorphic System Based on Spintronics for Green AI. | Soyed Tuhin Ahmed, Kamal Danouchi, Guillaume Prenat, Lorena Anghel, Mehdi B. Tahoori |
| 2024 | ETS | Testing Spintronics Implemented Monte Carlo Dropout-Based Bayesian Neural Networks. | Soyed Tuhin Ahmed, Kamal Danouchi, Michael Hefenbrock, Guillaume Prenat, Lorena Anghel, Mehdi B. Tahoori |
| 2023 | DATE | Scalable Spintronics-based Bayesian Neural Network for Uncertainty Estimation. | Soyed Tuhin Ahmed, Kamal Danouchi, Michael Hefenbrock, Guillaume Prenat, Lorena Anghel, Mehdi B. Tahoori |
| 2020 | DATE | A Universal Spintronic Technology based on Multifunctional Standardized Stack. | Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Lionel Torres, Sophiane Senni, Guillaume Patrigeon, Pascal Benoit, Gregory di Pendina, Guillaume Prenat |
| 2018 | DATE | Using multifunctional standardized stack as universal spintronic technology for IoT. | Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frdrick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamati, Pascal Nouet, Frederic Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, A. Atitoaie, I. Firastrau, Gregory di Pendina, Guillaume Prenat |
| 2018 | IOLTS | Resistive and Spintronic RAMs: Device, Simulation, and Applications. | Elena-Ioana Vatajelu, Lorena Anghel, Jean-Michel Portal, Marc Bocquet, Guillaume Prenat |
| 2014 | ASPDAC | Hybrid CMOS/magnetic Process Design Kit and SOT-based non-volatile standard cell architectures. | Gregory di Pendina, Kotb Jabeur, Guillaume Prenat |
| 2014 | DATE | Magnetic memories: From DRAM replacement to ultra low power logic chips. | Guillaume Prenat, Gregory di Pendina, Christophe Layer, Olivier Goncalves, K. Jaber, Bernard Dieny, Ricardo C. Sousa, Ioan Lucian Prejbeanu, Jean-Pierre Nozieres |
| 2013 | DAC | Non-volatile FPGAs based on spintronic devices. | Olivier Goncalves, Guillaume Prenat, Gregory di Pendina, Bernard Dieny |
| 2012 | DATE | Impact of resistive-open defects on the heat current of TAS-MRAM architectures. | Joao Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Guillaume Prenat, Jrmy Alvarez-Herault, Ken Mackay |
| 2012 | ETS | Coupling-based resistive-open defects in TAS-MRAM architectures. | Joao Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Guillaume Prenat, Jrmy Alvarez-Herault, Ken Mackay |
| 2011 | ICCAD | Hybrid CMOS/Magnetic Process Design Kit and application to the design of high-performances non-volatile logic circuits. | Guillaume Prenat, Bernard Dieny, Jean-Pierre Nozieres, Gregory di Pendina, Kholdoun Torki |
| 2004 | DATE | A 0.18 m CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns. | Lus Rolndez, Salvador Mir, Guillaume Prenat, Ahcne Bounceur |