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Hana Kubtov

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

39

Venues

7

Active years

2003–2022

Best venue rank

C

Where they publish

Papers

39 indexed papers, newest first.

YearVenueTitleAuthors
2022DSDVerification of Calculations of Non-Homogeneous Markov Chains Using Monte Carlo Simulation.Jan Rezncek, Martin Kohlk, Hana Kubtov
2021DSDSecure and dependable: Area-efficient masked and fault-tolerant architectures.Vojtech Miskovsk, Hana Kubtov, Martin Novotn
2020DSDNon-Homogeneous Continuous Time Markov Chains Calculations.Jan Rezncek, Martin Kohlk, Hana Kubtov
2020SECRefined Detection of SSH Brute-Force Attackers Using Machine Learning.Karel Hynek, Toms Benes, Toms Cejka, Hana Kubtov
2019DSDAccurate Inexact Calculations of Non-Homogeneous Markov Chains.Jan Rezncek, Martin Kohlk, Hana Kubtov
2018DSDCorrelation Power Analysis Distinguisher Based on the Correlation Trace Derivative.Petr Socha, Vojtech Miskovsk, Hana Kubtov, Martin Novotn
2017DDECSOptimization of Pearson correlation coefficient calculation for DPA and comparison of different approaches.Petr Socha, Vojtech Miskovsk, Hana Kubtov, Martin Novotn
2017DSDDependability Prediction Involving Temporal Redundancy and the Effect of Transient Faults.Martin Danhel, Filip Stepnek, Hana Kubtov
2017DSDInfluence of Fault-Tolerance Techniques on Power-Analysis Resistance of Cryptographic Design.Jan Riha, Vojtech Miskovsk, Hana Kubtov, Martin Novotn
2017QRSPredicting the Life Expectancy of Railway Fail-Safe Signaling Systems Using Dynamic Models with Censoring.Petr Novk, Martin Danhel, Rudolf B. Blazek, Martin Kohlk, Hana Kubtov
2016CNSMNEMEA: A framework for network traffic analysis.Toms Cejka, Vclav Bartos, Marek Svepes, Zdenek Rosa, Hana Kubtov
2016DDECSParity Waterfall method.Jaroslav Boreck, Martin Kohlk, Hana Kubtov
2016DDECSComparing proton and neutron induced SEU cross section in FPGA.Tomas Vanat, Filip Krizek, Jozef Ferencei, Hana Kubtov
2016DSDEnhanced Duplication Method with TMR-Like Masking Abilities.Jaroslav Boreck, Martin Kohlk, Pavel Vit, Hana Kubtov
2016DSDThe Effect of the Transient Faults in Dependability Prediction.Martin Danhel, Filip Stepnek, Hana Kubtov
2016FCCMP4-to-VHDL: Automatic Generation of 100 Gbps Packet Parsers.Pavel Bencek, Viktor Pus, Hana Kubtov
2015DSDA System for Radiation Testing and Physical Fault Injection into the FPGAs and Other Electronics.Tomas Vanat, Jan Pospiil, Filip Krizek, Jozef Ferencei, Hana Kubtov
2014DSDArchitecture of Effective High-Speed Network Stream Merger.Pavel Bencek, Hana Kubtov, Viktor Pus
2014DSDFault Tolerant Duplex System with High Availability for Practical Applications.Pavel Vit, Jaroslav Boreck, Martin Kohlk, Hana Kubtov
2013DSDPredictive Analysis of Mission Critical Systems Dependability.Martin Danhel, Hana Kubtov, Radek Dobias
2012DDECSReduction of complex safety models based on Markov chains.Martin Kohlk, Hana Kubtov
2012DSDMiscellaneous Types of Partial Duplication Modifications for Availability Improvements.Martin Kohlk, Jaroslav Boreck, Hana Kubtov
2011DSDFault Models Usability Study for On-line Tested FPGA.Jaroslav Boreck, Martin Kohlk, Pavel Kubalk, Hana Kubtov
2010DSDFaults Coverage Improvement Based on Fault Simulation and Partial Duplication.Jaroslav Boreck, Martin Kohlk, Hana Kubtov, Pavel Kubalk
2009DSDReliable Railway Station System Based on Regular Structure Implemented in FPGA.Jaroslav Boreck, Pavel Kubalk, Hana Kubtov
2008DSDDependability Evaluation of Real Railway Interlocking Device.Radek Dobias, Jan Konarski, Hana Kubtov
2008DSDAn Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA.Petr Fiser, Pavel Kubalk, Hana Kubtov
2008DSDExperimental SEU Impact on Digital Design Implemented in FPGAs.Jir Kvasnicka, Pavel Kubalk, Hana Kubtov
2007DDECSFault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System.Pavel Kubalk, Jir Kvasnicka, Hana Kubtov
2006DDECSMultiple-Vector Column-Matching BIST Design Method.Petr Fiser, Hana Kubtov
2006DDECSDependability Computation for Fault Tolerant Reconfigurable Duplex System.Pavel Kubalk, Radek Dobias, Hana Kubtov
2006DSDFlexible Two-Level Boolean Minimizer BOOM-II and Its Applications.Petr Fiser, Hana Kubtov
2006DSDDependable Design for FPGA Based on Duplex System and Reconfiguration.Pavel Kubalk, Radek Dobias, Hana Kubtov
2006IOLTSFault Tolerant System Design Method Based on Self-Checking Circuits.Pavel Kubalk, Petr Fiser, Hana Kubtov
2005DSDImprovement of the Fault Coverage of the Pseudo-Random Phase in Column-Matching BIST.Peter Filter, Hana Kubtov
2004DSDFPGA Based Design of the Railway's Interlocking Equipments.Radek Dobias, Hana Kubtov
2004DSDBoolean Minimizer FC-Min: Coverage Finding Process.Petr Fiser, Hana Kubtov
2004IOLTSSurvey of the Algorithms in the Column-Matching BIST Method.Petr Fiser, Hana Kubtov
2003DSDFC-Min: A Fast Multi-Output Boolean Minimizer.Petr Fiser, Jan Hlavicka, Hana Kubtov