| 2026 | ISCAS | Unified Architecture of Random Sampler for Fully Homomorphic Encryption. | Muhammad Ogin Hasanuddin, Muhammad Fajri Sachruddin, Hanho Lee |
| 2026 | ISCAS | Time-Area Efficient RNS Base-conversion Architecture for HPS-BFV Homomorphic Encryption using Generalized Solinas Primes. | Rella Mareta, Ardianto Satriawan, Hanho Lee |
| 2025 | ISCAS | Base Conversion RNS using Hybrid Barret-Karatsuba-Based Modulus Prime Cores for Homomorphic Multiplication. | Muhammad Ogin Hasanuddin, Rafael Aditya Cahyo W, Infall Syafalni, Nana Sutisna, Hanho Lee, Trio Adiono |
| 2025 | ISCAS | An Efficient NTT-Based Polynomial Multiplication Architecture for BFV Homomorphic Encryption. | Rella Mareta, Ardianto Satriawan, Hanho Lee |
| 2025 | ISCAS | Exploring Possibilities of BFV-based Homomorphic Encryption for Privacy-Preserving Image Processing. | Ardianto Satriawan, Rella Mareta, Hanho Lee |
| 2024 | ISCAS | Compact 2 | Rella Mareta, Hanho Lee |
| 2023 | ISCAS | CKKS-Based Homomorphic Encryption Architecture using Parallel NTT Multiplier. | Tuy Tan Nguyen, Jisu Kim, Hanho Lee |
| 2021 | ISCAS | High-Efficient Nonbinary LDPC Decoder with Early Layer Decoding Schedule. | Thang Xuan Pham, Hanho Lee |
| 2018 | ICASSP | Reduced-Complexity Trellis Min-Max Decoder for Non-Binary Ldpc Codes. | Huyen Pham Thi, Hanho Lee |
| 2018 | ISCAS | High-Secure Low-Latency Ring-LWE Cryptography Scheme for Biomedical Images Storing and Transmitting. | Tuy Nguyen Tan, Hanho Lee |
| 2017 | ISCAS | A delay-efficient ring-LWE cryptography architecture for biometric security. | Tuy Nguyen Tan, Hanho Lee |
| 2013 | ISCAS | High-performance iterative BCH decoder architecture for 100 Gb/s optical communications. | Jewong Yeon, Hanho Lee |
| 2012 | ISCAS | Concatenated non-binary LDPC and HD-FEC codes for 100Gb/s optical transport systems. | Chang-Seok Choi, Hanho Lee, Noriaki Kaneda, Young-Kai Chen |
| 2012 | ISCAS | A novel method of constructing Quasi-Cyclic RS-LDPC codes for 10GBASE-T Ethernet. | Seong-In Hwang, Hanho Lee, Shin-Il Lim |
| 2011 | ISCAS | A high-throughput LDPC decoder architecture for high-rate WPAN systems. | Kyung-Il Baek, Hanho Lee, Chang-Seok Choi, Sangmin Kim, Gerald E. Sobelman |
| 2011 | ISCAS | A high-speed low-complexity modified radix-2 | Taesang Cho, Hanho Lee, Jounsup Park, Chulgyun Park |
| 2011 | ISCAS | An area-efficient truncated inversionless Berlekamp-Massey architecture for Reed-Solomon decoders. | Jeong-In Park, Hanho Lee, Seongsoo Lee |
| 2008 | ISCAS | Two bit-level pipelined viterbi decoder for high-performance UWB applications. | Yong-Je Goo, Hanho Lee |
| 2008 | ISCAS | Adaptive quantization in min-sum based irregular LDPC decoder. | Sangmin Kim, Gerald E. Sobelman, Hanho Lee |
| 2008 | ISCAS | A high-speed four-parallel radix-2 | Minhyeok Shin, Hanho Lee |
| 2007 | ISCAS | A High-Speed Pipelined Degree-Computationless Modified Euclidean Algorithm Architecture for Reed-Solomon Decoders. | Seungbeom Lee, Hanho Lee, Jongyoon Shin, Je-Soo Ko |
| 2006 | ISCAS | A high-speed, low-complexity radix-2 | Jeesung Lee, Hanho Lee, Sang-in Cho, Sangsung Choi |
| 2006 | ISCAS | A reconfigurable FIR filter design using dynamic partial reconfiguration. | Yeong-Jae Oh, Hanho Lee, Chong Ho Lee |
| 2006 | KES | Implementation of a FIR Filter on a Partial Reconfigurable Platform. | Hanho Lee, Chang-Seok Choi |
| 2005 | ISCAS | An ultra high-speed Reed-Solomon decoder. | Hanho Lee |
| 2005 | KES | An Evolvable Hardware System Under Uneven Environment. | In Ja Jeon, Phill-Kyu Rhee, Hanho Lee |
| 2005 | KES | Reconfigurable Power-Aware Scalable Booth Multiplier. | Hanho Lee |
| 2003 | ISCAS | High-speed VLSI architecture for parallel Reed-Solomon decoder. | Hanho Lee |
| 2000 | ISCAS | VLSI design of Reed-Solomon decoder architectures. | Hanho Lee, Meng-Lin Yu, Leilei Song |
| 1999 | FCCM | A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor. | Lijun Gao, Sarvesh Shrivastava, Hanho Lee, Gerald E. Sobelman |
| 1998 | FCCM | Digit-Serial DSP Library for Optimized FPGA Configuration. | Hanho Lee, Gerald E. Sobelman |
| 1998 | FPGA | FPGA Logic Block Architecture for Digit-Serial DSP Applications (Abstract). | Hanho Lee, Sarvesh Shrivastava, Gerald E. Sobelman |