Harsh Rawat
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
2022–2025
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ISCAS | AnalogSim: a Modeling Framework for SRAM-based Analog In-Memory Computing. | Talha Bin Aslam, Anuj Grover, Harsh Rawat |
| 2023 | VLSID | A Common Mode Insensitive Process Tolerant Sense Amplifier Design for In Memory Compute Applications in 65nm LSTP Technology. | Belal Iqbal, Anuj Grover, Harsh Rawat |
| 2022 | ISCAS | 3-Stage Pipelined Hierarchical SRAMs with Burst Mode Read in 65nm LSTP CMOS. | Mukesh Kumar Srivastav, Rimjhim, Roshan Mishra, Anuj Grover, Kedar Janardan Dhori, Harsh Rawat |
| 2022 | VLSID | Retention Problem Free High Density 4T SRAM cell with Adaptive Body Bias in 18nm FD-SOI. | Chandan Kumar, Rahul Kumar, Anuj Grover, Shouri Chatterjee, Kedar Janardan Dhori, Harsh Rawat |