Helena Sarmento
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
1995–2012
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | DSD | High Level Modeling and Simulation of a Baseband Processor for the 60 GHz Band. | Ruben Cabral, Helena Sarmento |
| 2012 | DSD | Design of High-Speed Viterbi Decoders on Virtex-6 FPGAs. | Mrio P. Vstias, Horcio C. Neto, Helena Sarmento |
| 2012 | FPL | Sliding block Viterbi decoders in FPGA. | Mrio P. Vstias, Horcio C. Neto, Helena Sarmento |
| 1996 | DAC | Efficient Communication in a Design Environment. | Idalina Videira, Paulo Verssimo, Helena Sarmento |
| 1995 | ISCAS | Tool Management in an Electronic CAD Framework. | Joo Camara, Helena Sarmento |