Hiromitsu Imori
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
1992–1993
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1993 | ICS | A Scalar Architecture for Pseudo Vector Processing Based on Slide-Windowed Registers. | Hiroshi Nakamura, Taisuke Boku, Hideo Wada, Hiromitsu Imori, Ikuo Nakata, Yasuhiro Inagami, Kisaburo Nakazawa, Yoshiyuki Yamashita |
| 1992 | SC | Pseudo Vector Processor Based on Register-Windowed Superscalar Pipeline. | Kisaburo Nakazawa, Hiroshi Nakamura, Hiromitsu Imori, Shun Kawabe |