Horng-Fei Jyu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
1992–1995
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1995 | DATE | Prediction of interconnect delay in logic synthesis. | Horng-Fei Jyu, Sharad Malik |
| 1994 | DAC | Statistical Delay Modeling in Logic Design and Synthesis. | Horng-Fei Jyu, Sharad Malik |
| 1993 | ICCD | Statistical Timing Optimization of Combinatorial Logic Circuits. | Horng-Fei Jyu, Sharad Malik |
| 1992 | ICCD | Statistical Timing Analysis of Combinational Circuits. | Srinivas Devadas, Horng-Fei Jyu, Kurt Keutzer, Sharad Malik |