Hsiu-Chuan Shih
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2011–2013
Best venue rank
B
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | ASPDAC | Processor and DRAM integration by TSV-based 3-D stacking for power-aware SOCs. | Shin-Shiun Chen, Chun-Kai Hsu, Hsiu-Chuan Shih, Jen-Chieh Yeh, Cheng-Wen Wu |
| 2013 | DATE | An enhanced double-TSV scheme for defect tolerance in 3D-IC. | Hsiu-Chuan Shih, Cheng-Wen Wu |
| 2011 | VTS | Training-based forming process for RRAM yield improvement. | Hsiu-Chuan Shih, Ching-Yi Chen, Cheng-Wen Wu, Chih-He Lin, Shyh-Shyuan Sheu |