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Ian Kuon

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

8

Venues

3

Active years

2004–2009

Best venue rank

A*

Where they publish

Papers

8 indexed papers, newest first.

YearVenueTitleAuthors
2009FPGAVPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scaling.Jason Luu, Ian Kuon, Peter Jamieson, Ted Campbell, Andy Gean Ye, Wei Mark Fang, Jonathan Rose
2008DACAutomated transistor sizing for FPGA architecture exploration.Ian Kuon, Jonathan Rose
2008FPGAArea and delay trade-offs in the circuit and architecture design of FPGAs.Ian Kuon, Jonathan Rose
2006FPGAMeasuring the gap between FPGAs and ASICs.Ian Kuon, Jonathan Rose
2005FPGADesign, layout and verification of an FPGA using automated tools.Ian Kuon, Aaron Egier, Jonathan Rose
2004FCCMReconfigurable Molecular Dynamics Simulator.Navid Azizi, Ian Kuon, Aaron Egier, Ahmad Darabiha, Paul Chow
2004FPGAFPGA-based supercomputing: an implementation for molecular dynamics.Ian Kuon, Navid Azizi, Ahmad Darabiha, Aaron Egier, Paul Chow
2004FPGATransistor grouping and metal layer trade-offs in automatic tile layout of FPGAs.Ian Kuon, Aaron Egier, Jonathan Rose