Skip to content

J. A. Peperstraete

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

17

Venues

9

Active years

1982–1997

Best venue rank

A*

Where they publish

Papers

17 indexed papers, newest first.

YearVenueTitleAuthors
1997DACData Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets.Marleen Ad, Rudy Lauwereins, J. A. Peperstraete
1997RSPData routing in dataflow graphs.Luc De Coster, Rudy Lauwereins, J. A. Peperstraete
1996EuroParGlobal Approach for Compiled Bit-True Simulation of DSP Systems.Luc De Coster, Marc Engels, Rudy Lauwereins, J. A. Peperstraete
1996PDPCyclo-Dynamic Dataflow.Piet Wauters, Marc Engels, Rudy Lauwereins, J. A. Peperstraete
1996RSPImplementing DSP applications on heterogeneous targets using minimal size data buffers.Marleen Ad, Rudy Lauwereins, J. A. Peperstraete
1995ECRTSKernel services approach to fault-masking in real-time applications.Manga J. P. Bekambo, Johan Vounckx, Geert Deconinck, R. Cuyvers, Rudy Lauwereins, J. A. Peperstraete
1995RSPHardware-software codesign with GRAPE.Marleen Ad, Rudy Lauwereins, J. A. Peperstraete
1994ESANNVLSI complexity reduction by piece-wise approximation of the sigmoid function.Valeriu Beiu, J. A. Peperstraete, Joos Vandewalle, Rudy Lauwereins
1994RSPBuffer memory requirements in DSP applications.Marleen Ad, Rudy Lauwereins, J. A. Peperstraete
1994RSPGeometric parallelism and cyclo-static data flow in GRAPE-II.Rudy Lauwereins, Piet Wauters, Marleen Ad, J. A. Peperstraete
1994SIROCCOFault-Tolerant Compact Routing Based on Reduced Structural Information in Wormhole-Switching Based Networks.Johan Vounckx, Geert Deconinck, Rudy Lauwereins, J. A. Peperstraete
1993ESANNEfficient decomposition of comparison and its applications.Valeriu Beiu, J. A. Peperstraete, Joos Vandewalle, Rudy Lauwereins
1992RSPGRAPE-II: a tool for the rapid prototyping of multi-rate asynchronous DSP applications on heterogeneous multiprocessors.Rudy Lauwereins, Marc Engels, J. A. Peperstraete
1990RSPParallel processing enables the real-time emulation of DSP ASICs.Rudy Lauwereins, Marc Engels, J. A. Peperstraete
1987ICPPAn Integrated Software-Hardware Multiprocesor Project.Rudy Lauwereins, J. A. Peperstraete
1983ISCAImplementing Streams on a Data Flow Computer System With Paged MemoryL. J. Caluwaerts, J. Debacker, J. A. Peperstraete
1982ISCAA data flow architecture with a paged memory system.L. J. Caluwaerts, J. Debacker, J. A. Peperstraete