| 2006 | VTS | BIST Pretest of ICs: Risks and Benefits. | Yoshiyuki Nakamura, Jacob Savir, Hideo Fujiwara |
| 2003 | ITC | Analog Circuit Test using Transfer Function Coe .cient Estimates. | Zhen Guo, Jacob Savir |
| 2002 | ICCD | On the Detectability of Parametric Faults in Analog Circuits. | Jacob Savir, Zhen Guo |
| 2000 | ITC | MUST: multiple-stem analysis for identifying sequentially untestable faults. | Qiang Peng, Miron Abramovici, Jacob Savir |
| 2000 | ITC | On-line and off-line test of airborne digital systems: a reliability study. | Jacob Savir |
| 1999 | ICCD | Design for Testability to Combat Delay Faults. | Jacob Savir |
| 1998 | VTS | Distributed Generation of Weighted Random Patterns. | Jacob Savir |
| 1997 | ICCD | BIST-Based Fault Diagnosis in the Presence of Embedded Memories. | Jacob Savir |
| 1997 | ITC | Scan Latch Design for Delay Test. | Jacob Savir |
| 1997 | VTS | Random pattern testability of memory control logic. | Jacob Savir |
| 1997 | VTS | Salvaging test windows in BIST diagnostic. | Jacob Savir |
| 1996 | VTS | Delay Fault Testing: How Robust are Our Models? | Sandeep K. Gupta, Slawomir Pilarski, Sudhakar M. Reddy, Jacob Savir, Prab Varma |
| 1995 | VTS | On shrinking wide compressors. | Jacob Savir |
| 1994 | VTS | On broad-side delay test. | Jacob Savir, Srinivas Patil |
| 1992 | ITC | Skewed-Load Transition Test: Part 2, Coverage. | Srinivas Patil, Jacob Savir |
| 1992 | ITC | Skewed-Load Transition Test: Part 1, Calculus. | Jacob Savir |
| 1992 | VTS | Developments in delay testing. | Jacob Savir |
| 1991 | ITC | At-Speed Test is not Necessarily an AC Test. | Jacob Savir, Robert F. Berry |
| 1990 | ITC | AC product defect level and yield loss. | Jacob Savir |
| 1990 | ITC | A multiple seed linear feedback shift register. | Jacob Savir, William H. McAnney |
| 1989 | ITC | Testing for Coupled Cells in Random-Access Memories. | Jacob Savir, William H. McAnney, Salvatore R. Vecchio |
| 1988 | DAC | Why Partial Design Verification Works Better Than It Should. | Jacob Savir |
| 1988 | ITC | Identification of Failing Tests with Cycling Registers. | Jacob Savir, William H. McAnney |
| 1986 | ITC | Built-In Checking of the Correct Self-Test Signature. | William H. McAnney, Jacob Savir |
| 1986 | ITC | Random Pattern Testability of Delay Faults. | Jacob Savir, William H. McAnney |
| 1985 | ITC | Random Pattern Testing for Data-Line Faults in an Embedded Multiport Memory. | Jacob Savir, William H. McAnney, Salvatore R. Vecchio |
| 1985 | ITC | Random Pattern Testing for Address-Line Faults in an Embedded Multiport Memory. | Jacob Savir, William H. McAnney, Salvatore R. Vecchio |
| 1983 | ITC | On Random Pattern Test Length. | Jacob Savir, Paul H. Bardell |
| 1981 | ITC | VLSI Self-Testing Based on Syndrome Techniques. | Zeev Barzilai, Jacob Savir, George Markowsky, Merlin G. Smith |