Jacques Benkoski
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
1989–2002
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2002 | DATE | Power Crisis in SoC Design: Strategies for Constructing Low-Power, High-Performance SoC Designs. | K. Brock, C. Edwards, R. Lannoo, Ulf Schlichtmann, Antun Domic, Jacques Benkoski, David Overhauser, M. Kliment |
| 1991 | DAC | The Role of Timing Verification in Layout Synthesis. | Jacques Benkoski, Andrzej J. Strojwas |
| 1991 | ICCAD | Static Timing Analysis Using Interval Constraints. | Ronald B. Stewart, Jacques Benkoski |
| 1989 | DAC | Timing Verification by Formal Signal Interaction Modeling in a Multi-level Timing Simulator. | Jacques Benkoski, Andrzej J. Strojwas |
| 1989 | ITC | Computation of Delay Defect and Delay Fault Probabilities Using a Statistical Timing Simulator. | Jacques Benkoski, Andrzej J. Strojwas |