Jau-Shien Chang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
1994–1994
Best venue rank
A
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1994 | ITC | A Test-Clock Reduction Method for Scan-Designed Circuits. | Jau-Shien Chang, Chen-Shang Lin |