Jaushin Lee
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
8
Venues
4
Active years
1991–1993
Best venue rank
A*
Where they publish
Papers
8 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1993 | VTS | Impact of high level functional constraints on testability. | Jaushin Lee, Vivek Chickermane, Janak H. Patel |
| 1993 | VTS | Testability analysis based on structural and behavioral information. | Jaushin Lee, Janak H. Patel |
| 1992 | DAC | Hierarchical Test Generation under Intensive Global Functional Constraints. | Jaushin Lee, Janak H. Patel |
| 1992 | ICCAD | A comparative study of design for testability methods using high-level and gate-level descriptions. | Vivek Chickermane, Jaushin Lee, Janak H. Patel |
| 1992 | ITC | Design for Testability Using Architectural Descriptions. | Vivek Chickermane, Jaushin Lee, Janak H. Patel |
| 1992 | ITC | An Instruction Sequence Assembling Methodology for Testing Microprocessors. | Jaushin Lee, Janak H. Patel |
| 1991 | ICCAD | A Signal-Driven Discrete Relaxation Technique for Architectural Level Test Generation. | Jaushin Lee, Janak H. Patel |
| 1991 | ITC | ARTEST: An Architectural Level Test Generator for Data Path Faults and Control Faults. | Jaushin Lee, Janak H. Patel |