Javier Diaz-Fortuny
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2018–2025
Best venue rank
A
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DATE | Transistor Aging and Circuit Reliability at Cryogenic Temperatures. | Javier Diaz-Fortuny, Vishal Nayar |
| 2025 | ISCAS | A Ring-Oscillator-based Odometer to Unveil the Actual IC Usage Time. | F. de Los Santos-Prieto, Javier Diaz-Fortuny, Rafael Castro-Lpez, Elisenda Roca, Francisco V. Fernndez |
| 2019 | DATE | New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors. | Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-Lpez, Elisenda Roca Moreno, Javier Martn-Martnez, Rosana Rodrguez, Montserrat Nafra, Francisco V. Fernndez |
| 2018 | IOLTS | CMOS Characterization and Compact Modelling for Circuit Reliability Simulation. | Javier Diaz-Fortuny, Javier Martn-Martnez, Rosana Rodrguez, Montserrat Nafra, Rafael Castro-Lpez, Elisenda Roca, Francisco V. Fernndez |