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Javier Resano

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

6

Active years

2003–2019

Best venue rank

A*

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2019WCAEExposing Abstraction-Level Interactions with a Parallel Ray Tracer.Alejandro Valero, Daro Surez Gracia, Ruben Gran Tejero, Luis M. Ramos, Agustn Navarro-Torres, Adolfo Muoz, Joaqun Ezpeleta, Jos Luis Briz, Ana C. Murillo, Eduardo Montijano, Javier Resano, Mara Villarroya-Gaud, Jess Alastruey-Bened, Enrique F. Torres, Pedro lvarez, Pablo Ibez, Vctor Vials
2011FIEMini workshop - Real World Engineering Projects: Discovery-based curriculum modules for first-year students.Stephen Williams, Masoud Agah, Luiz A. DaSilva, Kamyar Dezhgosha, Allen B. MacKenzie, Nicky Mostert-Phipps, Sanjay Raman, Javier Resano
2009FPLFPGA support for satellite computations of hyper spectral images.Carlos Gonzlez, Daniel Mozos, Javier Resano
2006FPLA Dual Cache for Performance and Energy Aware Reconfigurable HW.Elena Perez Ramo, Javier Resano
2005DATEA Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware.Javier Resano, Daniel Mozos, Francky Catthoor
2004DACSpecific scheduling support to minimize the reconfiguration overhead of dynamically reconfigurable hardware.Javier Resano, Daniel Mozos
2004FPLA Specific Scheduling Flow for Dynamically Reconfigurable Hardware.Javier Resano
2003FCCMApplication of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms.Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor
2003FPLRun-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems.Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor