Jayanand Asok Kumar
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
6
Active years
2010–2013
Best venue rank
A*
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | DATE | Runtime verification of nonlinear analog circuits using incremental time-augmented RRT algorithm. | Seyed Nematollah Ahmadyan, Jayanand Asok Kumar, Shobha Vasudevan |
| 2012 | ASPDAC | Verifying dynamic power management schemes using statistical model checking. | Jayanand Asok Kumar, Shobha Vasudevan |
| 2012 | DAC | Goal-oriented stimulus generation for analog circuits. | Seyed Nematollah Ahmadyan, Jayanand Asok Kumar, Shobha Vasudevan |
| 2012 | DAC | Early prediction of NBTI effects using RTL source code analysis. | Jayanand Asok Kumar, Kenneth M. Butler, Heesoo Kim, Shobha Vasudevan |
| 2011 | FMCAD | Scaling probabilistic timing verification of hardware using abstractions in design source code. | Jayanand Asok Kumar, Lingyi Liu, Shobha Vasudevan |
| 2011 | VLSID | Variation-Conscious Formal Timing Verification in RTL. | Jayanand Asok Kumar, Shobha Vasudevan |
| 2010 | DSN | Statistical guarantees of performance for MIMO designs. | Jayanand Asok Kumar, Shobha Vasudevan |