Jayashree Sridharan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2004–2006
Best venue rank
A
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | DATE | Modeling multiple input switching of CMOS gates in DSM technology using HDMR. | Jayashree Sridharan, Tom Chen |
| 2006 | VLSID | Gate Delay Modeling with Multiple Input Switching for Static (Statistical) Timing Analysis. | Jayashree Sridharan, Tom Chen |
| 2004 | ISPDC | Mapping of Subtasks with Multiple Versions in a Heterogeneous Ad Hoc Grid Environment. | Sameer Shivle, Howard Jay Siegel, Anthony A. Maciejewski, Tarun Banka, Kiran Chindam, Steve Dussinger, Andrew Kutruff, Prashanth Penumarthy, Prakash Pichumani, Praveen Satyasekaran, David Sendek, J. Sousa, Jayashree Sridharan, Prasanna Sugavanam, Jose Velazco |