| 2021 | DATE | Hardware Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process. | Kamyar Mohajerani, Richard Haeussler, Rishub Nagpal, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj |
| 2021 | INDOCRYPT | A Lightweight Implementation of Saber Resistant Against Side-Channel Attacks. | Abubakr Abdulgadir, Kamyar Mohajerani, Viet Ba Dang, Jens-Peter Kaps, Kris Gaj |
| 2020 | CCS | Lightweight Implementation of the LowMC Block Cipher Protected Against Side-Channel Attacks. | Javad Bahrami, Viet Ba Dang, Abubakr Abdulgadir, Khaled N. Khasawneh, Jens-Peter Kaps, Kris Gaj |
| 2018 | CCS | Fixing the CLOC with Fine-grain Leakage Analysis. | William Diehl, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj |
| 2018 | FCCM | Improved Lightweight Implementations of CAESAR Authenticated Ciphers. | Farnoud Farahmand, William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj |
| 2017 | FPL | Comparison of hardware and software implementations of selected lightweight block ciphers. | William Diehl, Farnoud Farahmand, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj |
| 2015 | DATE | Comparison of multi-purpose cores of Keccak and AES. | Panasayya Yalla, Ekawat Homsirikamol, Jens-Peter Kaps |
| 2013 | DSD | FPGA PUF Based on Programmable LUT Delays. | Bilal Habib, Kris Gaj, Jens-Peter Kaps |
| 2013 | DSD | Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques. | Rajesh Velegalati, Kinjal Shah, Jens-Peter Kaps |
| 2011 | DSD | A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs. | Xin Xin, Jens-Peter Kaps, Kris Gaj |
| 2011 | FPL | Improving Security of SDDL Designs through Interleaved Placement on Xilinx FPGAs. | Rajesh Velegalati, Jens-Peter Kaps |
| 2011 | INDOCRYPT | Lightweight Implementations of SHA-3 Candidates on FPGAs. | Jens-Peter Kaps, Panasayya Yalla, Kishore Kumar Surapathi, Bilal Habib, Susheel Vadlamudi, Smriti Gurung, John Pham |
| 2010 | FCCM | DPA Resistant AES on FPGA Using Partial DDL. | Jens-Peter Kaps, Rajesh Velegalati |
| 2010 | FPL | ATHENa - Automated Tool for Hardware EvaluatioN: Toward Fair and Comprehensive Benchmarking of Cryptographic Hardware Using FPGAs. | Kris Gaj, Jens-Peter Kaps, Venkata Amirineni, Marcin Rogawski, Ekawat Homsirikamol, Benjamin Y. Brewster |
| 2009 | FPL | DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs. | Rajesh Velegalati, Jens-Peter Kaps |
| 2009 | FPL | Compact FPGA implementation of Camellia. | Panasayya Yalla, Jens-Peter Kaps |
| 2008 | INDOCRYPT | Chai-Tea, Cryptographic Hardware Implementations of xTEA. | Jens-Peter Kaps |
| 2006 | EUC | Energy Comparison of AES and SHA-1 for Ubiquitous Computing. | Jens-Peter Kaps, Berk Sunar |
| 2005 | PERCOM | State of the Art in Ultra-Low Power Public Key Cryptography for Wireless Sensor Networks. | Gunnar Gaubatz, Jens-Peter Kaps, Erdin ztrk, Berk Sunar |