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Jianwen Zhu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

40

Venues

13

Active years

1999–2020

Best venue rank

A*

Where they publish

Papers

40 indexed papers, newest first.

YearVenueTitleAuthors
2020FCCMRotary Register File: A Micro-Architectural Primitive on FPGA.Reza Nakhjavani, Jianwen Zhu
2017FCCMA Case for Common-Case: On FPGA Acceleration of Erasure Coding.Reza Nakhjavani, Jianwen Zhu
2016MASCOTSWrite Amplification with Write Skew.Yue Yang, Jianwen Zhu
2015SYSTORAlgebraic modeling of write amplification in hotness-aware SSD.Yue Yang, Jianwen Zhu
2012FPGASaturating the transceiver bandwidth: switch fabric design on FPGAs.Zefu Dai, Jianwen Zhu
2011ASPDACRegister pressure aware scheduling for high level synthesis.Rami Beidas, Wai Sum Mong, Jianwen Zhu
2011FPGARegular fabric for regular FPGA (abstract only).Xun Chen, Jianwen Zhu
2011FPLTiming-Driven Routing of High Fanout Nets.Xun Chen, Jianwen Zhu, Minxuan Zhang
2010FPGATowards scalable placement for FPGAs.Huimin Bian, Andrew C. Ling, Alexander Choong, Jianwen Zhu
2010FPGAA 1 cycle-per-byte XML parsing accelerator.Zefu Dai, Nick Ni, Jianwen Zhu
2010FPLParallelizing Simulated Annealing-Based Placement Using GPGPU.Alexander Choong, Rami Beidas, Jianwen Zhu
2010ICCADCredit Borrow and Repay: Sharing DRAM with minimum latency and bandwidth guarantees.Zefu Dai, Mark Jarvin, Jianwen Zhu
2010ICCDUsing variable clocking to reduce leakage in synchronous circuits.Navid Toosizadeh, Safwat G. Zaky, Jianwen Zhu
2009FPGATowards automated ECOs in FPGAs.Andrew C. Ling, Stephen Dean Brown, Jianwen Zhu, Sean Safarpour
2009ICCDVariPipe: Low-overhead variable-clock synchronous pipelines.Navid Toosizadeh, Safwat G. Zaky, Jianwen Zhu
2009SASIncreasing the Scope and Resolution of Interprocedural Static Single Assignment.Silvian Calman, Jianwen Zhu
2007ASPDACBddCut: Towards Scalable Symbolic Cut Enumeration.Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown
2005ASPDACScalable interprocedural register allocation for high level synthesis.Rami Beidas, Jianwen Zhu
2005ASPDACBDD-based two variable sharing extraction.Dennis Wu, Jianwen Zhu
2005DACA non-parametric approach for dynamic range estimation of nonlinear systems.Bin Wu, Jianwen Zhu, Farid N. Najm
2005DACTowards scalable flow and context sensitive pointer analysis.Jianwen Zhu
2004ASPDACAutomatic process migration of datapath hard IP libraries.Fang Fang, Jianwen Zhu
2004ASPDACPiecewise quadratic waveform matching with successive chord iteration.Zhong Wang, Jianwen Zhu
2004DACAn analytical approach for dynamic range estimation.Bin Wu, Jianwen Zhu, Farid N. Najm
2004ICCADDynamoSim: a trace-based dynamically compiled instruction set simulator.Massimo Poncino, Jianwen Zhu
2004ICCADDynamic range estimation for nonlinear systems.Bin Wu, Jianwen Zhu, Farid N. Najm
2004PLDISymbolic pointer analysis revisited.Jianwen Zhu, Silvian Calman
2003DACA retargetable micro-architecture simulator.Wai Sum Mong, Jianwen Zhu
2003DATETransistor-Level Static Timing Analysis by Piecewise Quadratic Waveform Matching.Zhong Wang, Jianwen Zhu
2003DATESpecification of Non-Functional Intellectual Property Components.Jianwen Zhu, Wai Sum Mong
2003ICCADPerformance Efficiency of Context-Flow System-on-Chip Platform.Rami Beidas, Jianwen Zhu
2002DACRetargetable binary utilities.Maghsoud Abbaspour, Jianwen Zhu
2002DSDHardware Implementation of a Memory Allocator.Khushwinder Jasrotia, Jianwen Zhu
2002ICCADSymbolic pointer analysis.Jianwen Zhu
2001ASPDACCompiling SpecC for simulation.Jianwen Zhu, Daniel Gajski
2001DATEMetaRTL: raising the abstraction level of RTL design.Jianwen Zhu
2001DATEStatic memory allocation by pointer analysis and coloring.Jianwen Zhu
2001ICCADColor Permutation: An Iterative Algorithm for Memory Packing.Jianwen Zhu, Edward S. Rogers Sr.
1999DACSoft Scheduling in High Level Synthesis.Jianwen Zhu, Daniel Gajski
1999DATEOpenJ: An Extensible System Level Design Language.Jianwen Zhu, Daniel Gajski