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Jing-Reng Huang

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

4

Active years

2000–2004

Best venue rank

A

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2004ITCAn SOC Test Integration Platform and Its Industrial Realization.Kuo-Liang Cheng, Jing-Reng Huang, Chih-Wea Wang, Chih-Yen Lo, Li-Ming Denq, Chih-Tsun Huang, Shin-Wei Hung, Jye-Yuan Lee
2001ISCASA low-cost CMOS time interval measurement core.Ming-Jun Hsiao, Jing-Reng Huang, Shao-Shen Yang, Tsin-Yuan Chang
2001ITCA built-in timing parametric measurement unit.Ming-Jun Hsiao, Jing-Reng Huang, Shao-Shen Yang, Tsin-Yuan Chang
2001VTSA Self-Test Methodology for IP Cores in Bus-Based Programmable SoCs.Jing-Reng Huang, Madhu K. Iyer, Kwang-Ting Cheng
2001VTSEmbedded-Software-Based Approach to Testing Crosstalk-Induced Faults at On-Chip Buses.Wei-Cheng Lai, Jing-Reng Huang, Kwang-Ting (Tim) Cheng
2000ASPDACA programmable built-in self-test core for embedded memories.Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu