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John Wawrzynek

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

61

Venues

22

Active years

1991–2025

Best venue rank

A*

Where they publish

Papers

61 indexed papers, newest first.

YearVenueTitleAuthors
2025ASPDACDEMOTIC: A Differentiable Sampler for Multi-Level Digital Circuits.Arash Ardakani, Minwoo Kang, Kevin He, Qijing Huang, Vighnesh M. Iyer, Suhong Moon, John Wawrzynek
2025ASPDACHigh-Effort Logic Synthesis Using Randomized Transduction.Yukio Miyasaka, Alan Mishchenko, John Wawrzynek, Dino Ruic, Xiaoqing Xu
2025DATEHigh-Throughput SAT Sampling.Arash Ardakani, Minwoo Kang, Kevin He, Qijing Huang, John Wawrzynek
2025FPGALessons from 40 Years of Reconfigurable Computing.John Wawrzynek
2025ICMLChip Placement with Diffusion Models.Vint Lee, Minh Nguyen, Leena Elzeiny, Chun Deng, Pieter Abbeel, John Wawrzynek
2024DACLate Breaking Results: Differential and Massively Parallel Sampling of SAT Formulas.Arash Ardakani, Minwoo Kang, Kevin He, Vighnesh M. Iyer, Suhong Moon, John Wawrzynek
2024FCCMSynthesis of LUT Networks for Random-Looking Dense Functions with Don't Cares - Towards Efficient FPGA Implementation of DNN.Yukio Miyasaka, Alan Mishchenko, John Wawrzynek, Nicholas J. Fraser
2023DATENarrowing the Synthesis Gap: Academic FPGA Synthesis is Catching Up With the Industry.Benjamin Lukas Cajus Barzen, Arya Reais-Parsi, Eddie Hung, Minwoo Kang, Alan Mishchenko, Jonathan W. Greene, John Wawrzynek
2023FPLSPADES: A Productive Design Flow for Versal Programmable Logic.Tan Nguyen, Zachary Blair, Stephen Neuendorffer, John Wawrzynek
2022ISPASSLearning A Continuous and Reconstructible Latent Space for Hardware Accelerator Design.Qijing Huang, Charles Hong, John Wawrzynek, Mahesh Subedar, Yakun Sophia Shao
2021FCCMHAO: Hardware-aware Neural Architecture Optimization for Efficient Inference.Zhen Dong, Yizhao Gao, Qijing Huang, John Wawrzynek, Hayden K. H. So, Kurt Keutzer
2021FPGACoDeNet: Efficient Deployment of Input-Adaptive Object Detection on Embedded FPGAs.Qijing Huang, Dequan Wang, Zhen Dong, Yizhao Gao, Yaohui Cai, Tian Li, Bichen Wu, Kurt Keutzer, John Wawrzynek
2021ISCACoSA: Scheduling by Constrained Optimization for Spatial Accelerators.Qijing Huang, Aravind Kalaiah, Minwoo Kang, James Demmel, Grace Dinh, John Wawrzynek, Thomas Norell, Yakun Sophia Shao
2019ASPDACGraphSAR: a sparsity-aware processing-in-memory architecture for large-scale graph processing on ReRAMs.Guohao Dai, Tianhao Huang, Yu Wang, Huazhong Yang, John Wawrzynek
2019FCCMAutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning.Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
2019FPGASynetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs.Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer
2019ICCADCentrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration.Qijing Huang, Christopher Yarp, Sagar Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, Krste Asanovic, John Wawrzynek
2019WCNCAntenna Array Geometries for Directional Wireless Networks.James C. Martin, Robert W. Brodersen, John Wawrzynek
2018FCCMNewGraph: Balanced Large-Scale Graph Processing on FPGAs with Low Preprocessing Overheads.Guohao Dai, Tianhao Huang, Yu Wang, Huazhong Yang, John Wawrzynek
2018PIMRCReceiver Adaptive Beamforming and Interference of Indoor Environments in mmWave.James C. Martin, Robert W. Brodersen, John Wawrzynek
2018SIGCOMMAWStream: adaptive wide-area streaming analytics.Ben Zhang, Xin Jin, Sylvia Ratnasamy, John Wawrzynek, Edward A. Lee
2017FPGAOLAF'17: Third International Workshop on Overlay Architectures for FPGAs.Hayden Kwok-Hay So, John Wawrzynek
2017ICCCNSelection and Aggregation of Location Information Provisioning Services.Filip Lemic, Vlado Handziski, Mladen Miksa, Jan M. Rabaey, John Wawrzynek, Adam Wolisz
2017IPINSLSR: A flexible middleware localization service architecture.Filip Lemic, Vlado Handziski, Ivan Azcarate, John Wawrzynek, Jan M. Rabaey, Adam Wolisz
2016FPGAOLAF'16: Second International Workshop on Overlay Architectures for FPGAs.Hayden Kwok-Hay So, John Wawrzynek
2016ICCADSynthesis of statically analyzable accelerator networks from sequential programs.Shaoyi Cheng, John Wawrzynek
2016IPINToward standardized localization service.Filip Lemic, Vlado Handziski, Nitesh Mor, Jan M. Rabaey, John Wawrzynek, Adam Wolisz
2016IWCMCLocalization as a feature of mmWave communication.Filip Lemic, James C. Martin, Christopher Yarp, Douglas S. Chan, Vlado Handziski, Robert W. Brodersen, Gerhard P. Fettweis, Adam Wolisz, John Wawrzynek
2013FCCMReconfigurable computing in the era of post-silicon scaling [panel discussion].Eric S. Chung, Doug Burger, Mike Butts, Jan Gray, Chuck Thacker, Kees A. Vissers, John Wawrzynek
2012DACChisel: constructing hardware in a Scala embedded language.Jonathan Bachrach, Huy Vo, Brian C. Richards, Yunsup Lee, Andrew Waterman, Rimas Avizienis, John Wawrzynek, Krste Asanovic
2012FCCMExploiting Memory-Level Parallelism in Reconfigurable Accelerators.Shaoyi Cheng, Mingjie Lin, Hao Jun Liu, Simon Scott, John Wawrzynek
2011FPGABridging the GPGPU-FPGA efficiency gap.Christopher W. Fletcher, Ilia A. Lebedev, Narges Bani Asadi, Daniel Burke, John Wawrzynek
2011FPGAUsing many-core architectural templates for FPGA-based computing (abstract only).Mingjie Lin, Shaoyi Cheng, John Wawrzynek
2011FPGAShould the academic community launch an open-source FPGA device and tools effort?: evening panel.John Wawrzynek
2010FPGAHigh-throughput bayesian computing machine with reconfigurable hardware.Mingjie Lin, Ilia A. Lebedev, John Wawrzynek
2010FPLOpenRCL: Low-Power High-Performance Computing with Reconfigurable Devices.Mingjie Lin, Ilia A. Lebedev, John Wawrzynek
2010ICSUntitled recordNarges Bani Asadi, Christopher W. Fletcher, Greg Gibeling, John Wawrzynek, Wing H. Wong, Garry P. Nolan
2009SCA design methodology for domain-optimized power-efficient supercomputing.Marghoob Mohiyuddin, Mark Murphy, Leonid Oliker, John Shalf, John Wawrzynek, Samuel Williams
2007FPLRAMP Blue: A Message-Passing Manycore System in FPGAs.Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg Gibeling, Pierre-Yves Droz
2007FPLAdventures with a Reconfigurable Research Platform.John Wawrzynek
2005FPLDefect Tolerance in Multiple-FPGA Systems.Zohair Hyder, John Wawrzynek
2004FPGAThe SFRA: a corner-turn FPGA architecture.Nicholas Weaver, John R. Hauser, John Wawrzynek
2003FPGAStochastic, spatial routing for hypergraphs, trees, and meshes.Randy Huang, John Wawrzynek, Andr DeHon
2003FPGAPost-placement C-slow retiming for the xilinx virtex FPGA.Nicholas Weaver, Yury Markovsky, Yatish Patel, John Wawrzynek
2003ICASSPQuality based compute-resource allocation in real-time signal processing.Joseph Yeh, John Wawrzynek
2002FCCMHardware-Assisted Fast Routing.Andr DeHon, Randy Huang, John Wawrzynek
2002FCCMThe Effects of Datapath Placement and C-Slow Retiming on Three Computational Benchmarks.Nicholas Weaver, John Wawrzynek
2002FPGAAnalysis of quasi-static scheduling techniques in a virtualized reconfigurable machine.Yury Markovsky, Eylon Caspi, Randy Huang, Joseph Yeh, Michael Chu, John Wawrzynek, Andr DeHon
2001NOSSDAVA case for network musical performance.John Lazzaro, John Wawrzynek
2000CASESAdapting software pipelining for reconfigurable computing.Timothy J. Callahan, John Wawrzynek
2000FPLStream Computations Organized for Reconfigurable Execution (SCORE).Eylon Caspi, Michael Chu, Randy Huang, Joseph Yeh, John Wawrzynek, Andr DeHon
1999DACReconfigurable Computing: What, Why, and Implications for Design Automation.Andr DeHon, John Wawrzynek
1999FPGAHSRA: High-Speed, Hierarchical Synchroous Reconfigurable Array.William Tsu, Kip Macy, Atul Joshi, Randy Huang, Norman Walker, Tony Tung, Omid Rowhani, George Varghese, John Wawrzynek, Andr DeHon
1999ICASSPA fixed-point recursive digital oscillator for additive synthesis of audio.Todd D. Hodes, John R. Hauser, John Wawrzynek, Adrian Freed, David Wessel
1998FCCMObject Oriented Circuit-Generators in Java.Michael Chu, Nicholas Weaver, Kolja Sulimma, Andr DeHon, John Wawrzynek
1998FPGAFast Module Mapping and Placement for Datapaths in FPGAs.Timothy J. Callahan, Philip Chong, Andr DeHon, John Wawrzynek
1998FPLInstruction-Level Parallelism for Reconfigurable Computing.Timothy J. Callahan, John Wawrzynek
1997FCCMDatapath-oriented FPGA mapping and placement for configurable computing.Timothy J. Callahan, John Wawrzynek
1997FCCMGarp: a MIPS processor with a reconfigurable coprocessor.John R. Hauser, John Wawrzynek
1991ASPLOSFine-Grain Parallelism with Minimal Hardware Support: A Compiler-Controlled Threaded Abstract Machine.David E. Culler, Anurag Sah, Klaus E. Schauser, Thorsten von Eicken, John Wawrzynek
1991DACA Two-Dimensional Topological Compactor With Octagonal Geometry.Paul de Dood, John Wawrzynek, Erwin Liu, Roberto Suaya