| 2026 | DATE | Improving Reliability in Quantized Graph Neural Networks with Node-Wise Entropy-driven Temperature Scaling. | Hadi Mousanejad Jeddi, Jos L. Nez-Yez |
| 2025 | ACSSC | Finite Word-Length Effects for Symmetric Matrix Inversion with Vector-Based Algorithms. | Olle Hansson, Jos L. Nez-Yez, Oscar Gustafsson |
| 2025 | SC | Towards Efficient Load Balancing BFS on GPUs: One Code for AMD, Intel & Nvidia. | Kaan Olgu, Tobias Kenter, Jos L. Nez-Yez, Simon McIntosh-Smith, Tom Deakin |
| 2022 | DSD | Analysis of Graph Processing in Reconfigurable Devices for Edge Computing Applications. | Kaan Olgu, Kris Nikov, Jos L. Nez-Yez |
| 2022 | DSD | A Low-complexity FPGA TDC based on a DSP Delay Line and a Wave Union Launcher. | Zijie Wang, Jiajun Lu, Jos L. Nez-Yez |
| 2018 | DATE | Multi-precision convolutional neural networks on heterogeneous hardware. | Sam Amiri, Mohammad Hosseinabady, Simon McIntosh-Smith, Jos L. Nez-Yez |
| 2018 | FPL | Workload Partitioning Strategy for Improved Parallelism on FPGA-CPU Heterogeneous Chips. | Sam Amiri, Mohammad Hosseinabady, Andrs Rodrguez, Rafael Asenjo, Angeles G. Navarro, Jos L. Nez-Yez |
| 2016 | DATE | Energy efficient video fusion with heterogeneous CPU-FPGA devices. | Peng Sun, Alin Achim, Ian Hasler, Paul R. Hill, Jos L. Nez-Yez |
| 2015 | EUC | Evaluation of Hybrid Run-Time Power Models for the ARM Big.LITTLE Architecture. | Krastin Nikov, Jos L. Nez-Yez, Matthew Horsnell |
| 2014 | FPL | Accurate power control and monitoring in ZYNQ boards. | Arash Farhadi Beldachi, Jos L. Nez-Yez |
| 2014 | ICIP | Joint video fusion and super resolution based on Markov random fields. | Jin Chen, Jos L. Nez-Yez, Alin Achim |
| 2013 | ICIP | Video super-resolution using low rank matrix completion. | Jin Chen, Jos L. Nez-Yez, Alin Achim |
| 2010 | FDL | SystemC Architectural Transaction Level Modelling for Large NoCs. | Mohammad Hosseinabady, Jos L. Nez-Yez |
| 2010 | FPL | Dynamic Reconfiguration Optimisation with Streaming Data Decompression. | Atukem Nabina, Jos L. Nez-Yez |
| 2010 | ISCAS | Effective modelling of large NoCs using SystemC. | Mohammad Hosseinabady, Jos L. Nez-Yez |
| 2009 | FPL | Run-time resource management in fault-tolerant network on reconfigurable chips. | Mohammad Hosseinabady, Jos L. Nez-Yez |
| 2009 | FPL | A biophysically accurate floating point somatic neuroprocessor. | Yiwei Zhang, Jos L. Nez-Yez, Joe McGeehan, Edward Regan, Stephen Kelly |
| 2008 | DSD | Power/Area Analysis of a FPGA-Based Open-Source Processor using Partial Dynamic Reconfiguration. | Izhar Zaidi, Atukem Nabina, Cedric Nishan Canagarajah, Jos L. Nez-Yez |
| 2008 | FPL | Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor. | Izhar Zaidi, Atukem Nabina, Cedric Nishan Canagarajah, Jos L. Nez-Yez |
| 2007 | FPL | Dynamic Voltage Scaling in a FPGA-based System-on-Chip. | Jos L. Nez-Yez, Vassilios A. Chouliaras, Jiri Gaisler |
| 2007 | ISCAS | On the Hardware Reduction of z-Datapath of Vectoring CORDIC. | R. Stapenhurst, Koushik Maharatna, Jimson Mathew, Jos L. Nez-Yez, Dhiraj K. Pradhan |