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Josef Schmid

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

5

Active years

1986–2021

Best venue rank

B

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2021DSDProgrammable Systems for Intelligence in Automobiles (PRYSTINE): Final results after Year 3.Norbert Druml, Anna Ryabokon, Rupert Schorn, Jochen Koszescha, Kaspars Ozols, Aleksandrs Levinskis, Rihards Novickis, Ethiopia Nigussie, Jouni Isoaho, Selim Solmaz, Georg Stettinger, Sergio E. Diaz, Mauricio Marcano, Jorge Villagra, Juan Medina, Martina Schwarz, Antonio Artuedo, Mauro Comi, Rutger Beekelaar, Onur zelik, Elif Aksu Tasdelen, Yesim Grbz, Jan Saijets, Jukka Kyynrinen, Dmitry Morits, Bjrn Debaillie, Maxim Rykunov, Joan Escamilla, Jarno Vanne, Tomi Korhonen, Kalle Holma, Eva-Maria Matzhold, Carlo Novara, Fabio Tango, Paolo Burgio, Giuseppe Calafiore, Milad Karimshoushtari, Emilie Boulay, Miguel Dhaens, Kylian Praet, Han Zwijnenberg, Henri Palm, David Aledo Ortega, Ercan Kalali, Tuomas Pensala, Arto Kyytinen, Morten Larsen, Omar Veledar, Georg Macher, Michael Lafer, Lorenzo Giraudi, Jakob Reckenzaun, Daniel Hammer, Naveen Mohan, Josef Schmid, Alfred H, Shai Ophir, Anand Dubey, Jonas Fuchs, Maximilian Lbke, Andrei Anghel, Nicolae-Catalin Ristea, Martin Trngren, Alua Musralina, Marlene Harter, Joseena Memadathil Jose, George Dimitrakopoulos
2021SAFECOMPIntegration of a RTT Prediction into a Multi-path Communication Gateway.Josef Schmid, Patrick Purucker, Mathias Schneider, Rick vander Zwet, Morten Larsen, Alfred H
2019IWCMCA Comparison of AI-Based Throughput Prediction for Cellular Vehicle-To-Server Communication.Josef Schmid, Mathias Schneider, Alfred H, Bjrn W. Schuller
2018IWCMCPassive monitoring and geo-based prediction of mobile network vehicle-to-server communication.Josef Schmid, Philipp Hes, Alfred H, Bjrn W. Schuller
1999VTSAdvanced Synchronous Scan Test Methodology for Multi Clock Domain ASICs.Josef Schmid, Joachim Knblein
1986ICASSPOn the IC architecture and design of a 2 m CMOS 8 MIPS digital signal processor with parallel processing capability: The PCB5010/5011.Frans J. van Wijk, Frank P. Welten, Jef L. van Meerbergen, Jan Stoter, Jos A. Huisken, Antoine Delaruelle, Karel E. van Eerdewijk, Josef Schmid, Jan H. Wittek