| 2009 | CASES | Hybrid multithreading for VLIW processors. | Manoj Gupta, Fermn Snchez, Josep Llosa |
| 2009 | ICPP | Thread Merging Schemes for Multithreaded Clustered VLIW Processors. | Manoj Gupta, Fermn Snchez, Josep Llosa |
| 2007 | DSD | Merge Logic for Clustered Multithreaded VLIW Processors. | Manoj Gupta, Fermn Snchez, Josep Llosa |
| 2007 | DSD | Silicon Compaction/Defragmentation for Partial Runtime Reconfiguration. | Kolin Paul, Jol Porquet, Josep Llosa |
| 2007 | ICCD | Cluster-level simultaneous multithreading for VLIW processors. | Manoj Gupta, Fermn Snchez, Josep Llosa |
| 2004 | HPCA | Out-of-Order Commit Processors. | Adrin Cristal, Daniel Ortega, Josep Llosa, Mateo Valero |
| 2002 | ICS | A comparative study of modulo scheduling techniques. | Josep M. Codina, Josep Llosa, Antonio Gonzlez |
| 2002 | MICRO | Reduced code size modulo scheduling in the absence of hardware support. | Josep Llosa, Stefan M. Freudenberger |
| 2001 | MICRO | Modulo scheduling with integrated register spilling for clustered VLIW architectures. | Javier Zalamea, Josep Llosa, Eduard Ayguad, Mateo Valero |
| 2000 | EuroPar | A Fast and Accurate Approach to Analyze Cache Memory Behavior (Research Note). | Xavier Vera, Josep Llosa, Antonio Gonzlez, Nerina Bermudo |
| 2000 | ISPASS | An efficient solver for Cache Miss Equations. | Nerina Bermudo, Xavier Vera, Antonio Gonzlez, Josep Llosa |
| 2000 | MICRO | Two-level hierarchical register file organization for VLIW processors. | Javier Zalamea, Josep Llosa, Eduard Ayguad, Mateo Valero |
| 2000 | PLDI | Improved spill code generation for software pipelined loops. | Javier Zalamea, Josep Llosa, Eduard Ayguad, Mateo Valero |
| 1999 | HPCA | Distributed Modulo Scheduling. | Marcio Merino Fernandes, Josep Llosa, Nigel P. Topham |
| 1999 | ICPP | Impact on Performance of Fused Multiply-Add Units in Aggressive VLIW Architectures. | David Lpez, Josep Llosa, Eduard Ayguad, Mateo Valero |
| 1998 | ICS | Resource Widening Versus Replication: Limits and Performance-cost Trade-off. | David Lpez, Josep Llosa, Mateo Valero, Eduard Ayguad |
| 1998 | MICRO | Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures. | David Lpez, Josep Llosa, Mateo Valero, Eduard Ayguad |
| 1997 | EuroPar | Allocating Lifetimes to Queues in Software Pipelined Architectures. | Marcio Merino Fernandes, Josep Llosa, Nigel P. Topham |
| 1997 | ICS | Increasing Memory Bandwidth with Wide Buses: Compiler, Hardware and Performance Trade-Offs. | David Lpez, Mateo Valero, Josep Llosa, Eduard Ayguad |
| 1996 | MICRO | Heuristics for Register-Constrained Software Pipelining. | Josep Llosa, Mateo Valero, Eduard Ayguad |
| 1995 | HPCA | Non-Consistent Dual Register Files to Reduce Register Pressure. | Josep Llosa, Mateo Valero, Eduard Ayguad |
| 1995 | MICRO | Hypernode reduction modulo scheduling. | Josep Llosa, Mateo Valero, Eduard Ayguad, Antonio Gonzlez |