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Joseph B. Manzano

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

31

Venues

20

Active years

2003–2026

Best venue rank

A*

Where they publish

Papers

31 indexed papers, newest first.

YearVenueTitleAuthors
2026FCCMTowards Compiler-Driven Dynamic Partial Reconfiguration with MLIR.Gabriel Rodriguez-Canal, Nick Brown, Maurice Jamieson, Nicolas Bohm Agostini, Ankur Limaye, Vito Giovanni Castellana, Joseph B. Manzano, Antonino Tumeo
2026FPGATowards Scheduling of Pipelined Dataflow Graphs in MLIR.Gabriel Rodriguez-Canal, Nicolas Bohm Agostini, Ankur Limaye, Vito Giovanni Castellana, Joseph B. Manzano, Antonino Tumeo, Maurice Jamieson, Nick Brown
2025CCGRIDScaling Laws for the Workload Throughput of Emerging Heterogeneous Clusters.Akhil Alasandagutti, Joshua Suetterlein, Jesun Firoz, Stephen J. Young, Joseph B. Manzano, Jason R. Stewart, Patrick G. Bridges, Trilce Estrada, Kevin J. Barker
2025ICCADNeuromorphic Architectures for Scientific Computing: a Structural Characterization Case Study.M. Lakshmi Varshika, Jonathan Hollenbach, Nicolas Bohm Agostini, Ankur Limaye, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, Anup Das, Mitra Taheri, Antonino Tumeo
2024ASPDACTowards Automated Generation of Chiplet-Based Systems Invited Paper.Ankur Limaye, Claudio Barone, Nicolas Bohm Agostini, Marco Minutoli, Joseph B. Manzano, Vito Giovanni Castellana, Giovanni Gozzi, Michele Fiorito, Serena Curzel, Fabrizio Ferrandi, Antonino Tumeo
2024ICCADExtending High-Level Synthesis with AI/ML Methods.Nicolas Bohm Agostini, Giovanni Gozzi, Michele Fiorito, Claudio Barone, Serena Curzel, Ankur Limaye, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, Fabrizio Ferrandi, Antonino Tumeo
2024ISPASSAutomatic Extraction of Network Configurations for Realistic Simulation and Validation.Joshua Suetterlein, Stephen J. Young, Jesun Firoz, Joseph B. Manzano, Ryan D. Friese, Nathan R. Tallent, Kevin J. Barker, Timothy Stavenger
2024SBAC-PADA Performance and Energy Study of GPU-Resident Preconditioners for Conjugate Gradient Solvers: In the Context of Existing and Novel Approaches.Kasia Swirydowicz, Jesun Firoz, Joseph B. Manzano, Mahantesh Halappanavar, Stephen Thomas, Kevin J. Barker
2023ASPDACTowards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis.Vito Giovanni Castellana, Nicolas Bohm Agostini, Ankur Limaye, Vinay Amatya, Marco Minutoli, Joseph B. Manzano, Antonino Tumeo, Serena Curzel, Michele Fiorito, Fabrizio Ferrandi
2023ICISSPAssessing Risk in High Performance Computing Attacks.Erika A. Leal, Cimone Wright-Hamor, Joseph B. Manzano, Nicholas J. Multari, Kevin J. Barker, David O. Manz, Jiang Ming
2022DACThe SODA approach: leveraging high-level synthesis for hardware/software co-design and hardware specialization: invited.Nicolas Bohm Agostini, Serena Curzel, Ankur Limaye, Vinay Amatya, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, Antonino Tumeo, Fabrizio Ferrandi
2022ICCADAn MLIR-based Compiler Flow for System-Level Design and Hardware Acceleration.Nicolas Bohm Agostini, Serena Curzel, Vinay Amatya, Cheng Tan, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, David R. Kaeli, Antonino Tumeo
2022ICCADSODA Synthesizer: An Open-Source, Multi-Level, Modular, Extensible Compiler from High-Level Frameworks to Silicon.Nicolas Bohm Agostini, Ankur Limaye, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, Antonino Tumeo, Serena Curzel, Fabrizio Ferrandi
2021ICCADAutomated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators.Serena Curzel, Nicolas Bohm Agostini, Shihao Song, Ismet Dagli, Ankur Limaye, Cheng Tan, Marco Minutoli, Vito Giovanni Castellana, Vinay Amatya, Joseph B. Manzano, Anup Das, Fabrizio Ferrandi, Antonino Tumeo
2021SCMAPA: multi-accelerator pattern allocation policy for multi-tenant GPU servers.Kiran Ranganath, Joshua D. Suetterlein, Joseph B. Manzano, Shuaiwen Leon Song, Daniel Wong
2020DACInvited: Software Defined Accelerators From Learning Tools Environment.Antonino Tumeo, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, Vinay Amatya, David Brooks, Gu-Yeon Wei
2020HiPCOn the Marriage of Asynchronous Many Task Runtimes and Big Data: A Glance.Joshua Suetterlein, Joseph B. Manzano, Andres Marquez, Guang R. Gao
2020ICCADSODA: a New Synthesis Infrastructure for Agile Hardware Design of Machine Learning Accelerators.Marco Minutoli, Vito Giovanni Castellana, Cheng Tan, Joseph B. Manzano, Vinay Amatya, Antonino Tumeo, David Brooks, Gu-Yeon Wei
2019DATEA Parallel Graph Environment for Real-World Data Analytics Workflows.Vito Giovanni Castellana, Maurizio Drocco, John Feo, Jesun Sahariar Firoz, Thejaka Amila Kanewala, Andrew Lumsdaine, Joseph B. Manzano, Andres Marquez, Marco Minutoli, Joshua Suetterlein, Antonino Tumeo, Marcin Zalewski
2018HiPCCharacterization of the Impact of Soft Errors on Iterative Methods.Burcu Ozcelik Mutlu, Gokcen Kestor, Joseph B. Manzano, Osman S. Unsal, Samrat Chatterjee, Sriram Krishnamoorthy
2017SCVerification of the Extended Roofline Model for Asynchronous Many Task Runtimes.Joshua Suetterlein, Joshua Landwehr, Andres Marquez, Joseph B. Manzano, Kevin J. Barker, Guang R. Gao
2016CLUSTERExtending the Roofline Model for Asynchronous Many-Task Runtimes.Joshua D. Suetterlein, Joshua Landwehr, Andrs Mrquez, Joseph B. Manzano, Guang R. Gao
2015CGOLocality aware concurrent start for stencil applications.Sunil Shrestha, Guang R. Gao, Joseph B. Manzano, Andrs Mrquez, John Feo
2015HPCCGregarious Data Re-structuring in a Many Core Architecture.Sunil Shrestha, Joseph B. Manzano, Andrs Mrquez, Stphane Zuckerman, Shuaiwen Song, Guang R. Gao
2014ICPADSACDT: Architected Composite Data Types trading-in unfettered data access for improved execution.Andres Marquez, Joseph B. Manzano, Shuaiwen Leon Song, Benot Meister, Sunil Shrestha, Thomas St. John, Guang R. Gao
2011ICSThe elephant and the mice: the role of non-strict fine-grain synchronization for modern many-core architectures.Juergen Ributzka, Yuhei Hayashi, Joseph B. Manzano, Guang R. Gao
2010EuroParA Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures.Chen Chen, Joseph B. Manzano, Ge Gan, Guang R. Gao, Vivek Sarkar
2009EuroParTile Percolation: An OpenMP Tile Aware Parallelization Technique for the Cyclops-64 Multicore Processor.Ge Gan, Xu Wang, Joseph B. Manzano, Guang R. Gao
2008ICPADSA Quantitative Study of the On-Chip Network and Memory Hierarchy Design for Many-Core Processor.Xu Wang, Ge Gan, Joseph B. Manzano, Dongrui Fan, Shuxu Guo
2004SCAMSoftware De-Pipelining Technique.Bogong Su, Jian Wang, Erh-Wen Hu, Joseph B. Manzano
2003ICASSPDe-pipeline a software-pipelined loop.Bogong Su, Jian Wang, Erh-Wen Hu, Joseph B. Manzano