Skip to content

Joshua M. Levine

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

3

Active years

2011–2023

Best venue rank

A

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2023FPLFPGA-Accelerated Causal Discovery with Conditional Independence Test Prioritization.Ce Guo, Diego Cupello, Wayne Luk, Joshua M. Levine, Alexander Warren, Peter Brookes
2017FPLSTRIPE: Signal selection for runtime power estimation.James J. Davis, Joshua M. Levine, Edward A. Stott, Eddie Hung, Peter Y. K. Cheung, George A. Constantinides
2016FCCMKAPow: A System Identification Approach to Online Per-Module Power Estimation in FPGA Designs.Eddie Hung, James J. Davis, Joshua M. Levine, Edward A. Stott, Peter Y. K. Cheung, George A. Constantinides
2016FPGAKnowledge is Power: Module-level Sensing for Runtime Optimisation (Abstact Only).James J. Davis, Eddie Hung, Joshua M. Levine, Edward A. Stott, Peter Y. K. Cheung, George A. Constantinides
2015FPGADelay-Bounded Routing for Shadow Registers.Eddie Hung, Joshua M. Levine, Edward A. Stott, George A. Constantinides, Wayne Luk
2014FCCMTiming Fault Detection in FPGA-Based Circuits.Edward A. Stott, Joshua M. Levine, Peter Y. K. Cheung, Nachiket Kapre
2014FPGADynamic voltage & frequency scaling with online slack measurement.Joshua M. Levine, Edward A. Stott, Peter Y. K. Cheung
2013FPLSMI: Slack Measurement Insertion for online timing monitoring in FPGAs.Joshua M. Levine, Edward A. Stott, George A. Constantinides, Peter Y. K. Cheung
2012FCCMOnline Measurement of Timing in Circuits: For Health Monitoring and Dynamic Voltage & Frequency Scaling.Joshua M. Levine, Edward A. Stott, George A. Constantinides, Peter Y. K. Cheung
2011FPGAHealth monitoring of live circuits in FPGAs based on time delay measurement (abstract only).Joshua M. Levine, Edward A. Stott, George A. Constantinides, Peter Y. K. Cheung