K. C. Yarlagadda
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
1991–1992
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1992 | VTS | A concurrent checking scheme for single and multibit errors in logic circuits. | B. Kolla, Parag K. Lala, K. C. Yarlagadda |
| 1991 | VTS | An approach for designing self-checking logic using residue codes. | Parag K. Lala, Fadi Y. Busaba, K. C. Yarlagadda |