| 2025 | ISCAS | VeriBench: Benchmarking Large Language Models for Verilog Code Generation and Design Synthesis. | Mihir Agarwal, Zaqi Momin, Kailash Prasad, Joycee Mekie |
| 2024 | VLSID | FP-ATM: A Flexible Floating Point NOR Adder Tree Macro for In-Memory Computing. | Yathin Kumar Attuluri, Ruchit Chudasama, Kailash Prasad, Joycee Mekie |
| 2024 | VLSID | FP-BMAC: Efficient Approximate Floating-Point Bit-Parallel MAC Processor using IMC. | Saketh Gajawada, Aryan Gupta, Kailash Prasad, Joycee Mekie |
| 2024 | VLSID | Hybrid CMOS-Memristor Logic for Boosting the Power-Efficiency in Error Tolerant Applications. | Monika Pokharia, Kailash Prasad, Ravi S. Hegde, Joycee Mekie |
| 2024 | VLSID | SDR-PUF: Sequence-Dependent Reconfigurable SRAM PUF with an Exponential CRP Space. | Kailash Prasad, Neel Shah, Jinay Dagli, Joycee Mekie |
| 2023 | ASPDAC | Hardware-Software Codesign of DNN Accelerators Using Approximate Posit Multipliers. | Tom Glint, Kailash Prasad, Jinay Dagli, Krishil Gandhi, Aryan Gupta, Vrajesh Patel, Neel Shah, Joycee Mekie |
| 2023 | DAC | PVC-RAM:Process Variation Aware Charge Domain In-Memory Computing 6T-SRAM for DNNs. | Sai Shubham, Shubham Pandit, Kailash Prasad, Joycee Mekie |
| 2023 | DATE | PIC-RAM: Process-Invariant Capacitive Multiplier Based Analog In Memory Computing in 6T SRAM. | Kailash Prasad, Aditya Biswas, Arpita Kabra, Joycee Mekie |
| 2023 | DATE | Process Variation Resilient Current-Domain Analog In Memory Computing. | Kailash Prasad, Sai Shubham, Aditya Biswas, Joycee Mekie |
| 2023 | VLSID | Fast and Robust Sense Amplifier for Digital In Memory Computing. | Kailash Prasad, Ayush Srivastava, Nistha Baruah, Joycee Mekie |
| 2022 | ISCAS | An Automated Approach to Compare Bit Serial and Bit Parallel In-Memory Computing for DNNs. | Alok Parmar, Kailash Prasad, Nanditha P. Rao, Joycee Mekie |
| 2020 | ISCAS | FPAD: A Multistage Approximation Methodology for Designing Floating Point Approximate Dividers. | Chandan Kumar Jha, Kailash Prasad, Vibhor Kumar Srivastava, Joycee Mekie |
| 2020 | ISCAS | SEDAAF: FPGA Based Single Exact Dual Approximate Adders for Approximate Processors. | Chandan Kumar Jha, Kailash Prasad, Arun Singh Tomar, Joycee Mekie |