Kapil Vyas
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2007–2009
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | VLSID | A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link. | Vijay Khawshe, Kapil Vyas, Renu Rangnekar, Prateek Goyal, Vijay Krishna, Kashinath Prabhu, Pravin Kumar Venkatesan, Leneesh Raghavan, Rajkumar Palwai, M. Thrivikraman, Kunal Desai, Abhijit Abhyankar |
| 2007 | VLSID | A 2.5Gbps Quad CMOS Transceiver Cell Using Regulated Supply Low Jitter PLL. | Vijay Khawshe, Pravin V. Kumar, Renu Rangnekar, Kapil Vyas, Kashi Prabu, Mahabaleshwara, Manish Jain, Navin K. Mishra, Abhijit Abhyankar |