Karel Heyse
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
2011–2015
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | DAC | Avoiding transitional effects in dynamic circuit specialisation on FPGAs. | Karel Heyse, Dirk Stroobandt |
| 2015 | FPL | Estimating circuit delays in FPGAs after technology mapping. | Berg Severens, Elias Vansteenkiste, Karel Heyse, Dirk Stroobandt |
| 2013 | FPL | Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS. | Karel Heyse, Tom Davidson, Elias Vansteenkiste, Karel Bruneel, Dirk Stroobandt |
| 2012 | FPL | Mapping logic to reconfigurable FPGA routing. | Karel Heyse, Karel Bruneel, Dirk Stroobandt |
| 2011 | FPL | Memory-Efficient and Fast Run-Time Reconfiguration of Regularly Structured Designs. | Brahim Al Farisi, Karel Heyse, Karel Bruneel, Dirk Stroobandt |