| 2010 | DAC | Design and analysis of compact ultra energy-efficient logic gates using laterally-actuated double-electrode NEMS. | Hamed F. Dadgour, Muhammad Mustafa Hussain, Casey Smith, Kaustav Banerjee |
| 2010 | DATE | Aging-resilient design of pipelined architectures using novel detection and correction circuits. | Hamed F. Dadgour, Kaustav Banerjee |
| 2010 | DATE | Efficient 3D high-frequency impedance extraction for general interconnects and inductors above a layered substrate. | Navin Srivastava, Roberto Suaya, Kaustav Banerjee |
| 2010 | ICCAD | Work-function variation induced fluctuation in bias-temperature-instability characteristics of emerging metal-gate devices and implications for digital design. | Seid Hadi Rasouli, Kazuhiko Endo, Kaustav Banerjee |
| 2010 | ISLPED | A new paradigm in the design of energy-efficient digital circuits using laterally-actuated double-gate NEMs. | Hamed F. Dadgour, Muhammad Mustafa Hussain, Kaustav Banerjee |
| 2009 | ASPDAC | High-speed low-power FinFET based domino logic. | Seid Hadi Rasouli, Hanpei Koike, Kaustav Banerjee |
| 2009 | FPGA | CMOS vs Nano: comrades or rivals? | Deming Chen, Russell Tessier, Kaustav Banerjee, Mojy C. Chian, Andr DeHon, Shinobu Fujita, James Hutchby, Steve Trimberger |
| 2009 | ICCAD | Variability analysis of FinFET-based devices and circuits considering electrical confinement and width quantization. | Seid Hadi Rasouli, Kazuhiko Endo, Kaustav Banerjee |
| 2009 | ICCAD | Fast 3-D thermal analysis of complex interconnect structures using electrical modeling and simulation methodologies. | Chuan Xu, Lijun Jiang, Seshadri K. Kolluri, Barry J. Rubin, Alina Deutsch, Howard H. Smith, Kaustav Banerjee |
| 2008 | DAC | Analysis and implications of parasitic and screening effects on the high-frequency/RF performance of tunneling-carbon nanotube FETs. | Chaitanya Kshirsagar, Mohamed N. El-Zeftawi, Kaustav Banerjee |
| 2008 | DATE | High-Frequency Mutual Impedance Extraction of VLSI Interconnects In the Presence of a Multi-layer Conducting Substrate. | Navin Srivastava, Roberto Suaya, Kaustav Banerjee |
| 2008 | ICCAD | Statistical modeling of metal-gate work-function variability in emerging device technologies and implications for circuit design. | Hamed F. Dadgour, Vivek De, Kaustav Banerjee |
| 2007 | DAC | Design and Analysis of Hybrid NEMS-CMOS Circuits for Ultra Low-Power Applications. | Hamed F. Dadgour, Kaustav Banerjee |
| 2007 | VLSID | Tutorial 5: SoC Communication Architectures: Technology, Current Practice, Research, and Trends. | Nikil D. Dutt, Kaustav Banerjee, Luca Benini, Kanishka Lahiri, Sudeep Pasricha |
| 2006 | ASPDAC | Electrothermal engineering in the nanometer era: from devices and interconnects to circuits and systems. | Kaustav Banerjee, Sheng-Chih Lin, Navin Srivastava |
| 2006 | ASPLOS | Introspective 3D chips. | Shashidhar Mysore, Banit Agrawal, Navin Srivastava, Sheng-Chih Lin, Kaustav Banerjee, Timothy Sherwood |
| 2006 | DAC | Are carbon nanotubes the future of VLSI interconnections? | Kaustav Banerjee, Navin Srivastava |
| 2006 | DAC | A novel variation-aware low-power keeper architecture for wide fan-in dynamic gates. | Hamed F. Dadgour, Rajiv V. Joshi, Kaustav Banerjee |
| 2006 | DAC | A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy. | Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sheng-Chih Lin, Timothy Sherwood, Kaustav Banerjee |
| 2006 | ICCAD | An electrothermally-aware full-chip substrate temperature gradient evaluation methodology for leakage dominant technologies with implications for power estimation and hot-spot management. | Sheng-Chih Lin, Kaustav Banerjee |
| 2005 | ICCAD | Performance analysis of carbon nanotube interconnects for VLSI applications. | Navin Srivastava, Kaustav Banerjee |
| 2005 | ICCD | A Thermally-Aware Methodology for Design-Specific Optimization of Supply and Threshold Voltages in Nanometer Scale ICs. | Sheng-Chih Lin, Navin Srivastava, Kaustav Banerjee |
| 2005 | ISLPED | A probabilistic framework for power-optimal repeater insertion in global interconnects under parameter variations. | Vineet Wason, Kaustav Banerjee |
| 2004 | DAC | Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era. | Anirban Basu, Sheng-Chih Lin, Vineet Wason, Amit Mehrotra, Kaustav Banerjee |
| 2004 | ISLPED | A probabilistic framework to estimate full-chips subthreshold leakage power distribution considering within-die and die-to-die P-T-V variations. | Songqing Zhang, Vineet Wason, Kaustav Banerjee |
| 2003 | ICCAD | A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits. | Santanu Mahapatra, Kaustav Banerjee, Florent Pegeon, Adrian M. Ionescu |
| 2002 | DAC | Few electron devices: towards hybrid CMOS-SET integrated circuits. | Adrian M. Ionescu, Michel J. Declercq, Santanu Mahapatra, Kaustav Banerjee, Jacques Gautier |
| 2002 | ICCAD | Analysis and optimization of substrate noise coupling in single-chip RF transceiver design. | Adil Koukab, Kaustav Banerjee, Michel J. Declercq |
| 2002 | ISCAS | A SET quantizer circuit aiming at digital communication system. | Santanu Mahapatra, Adrian M. Ionescu, Kaustav Banerjee, Michel J. Declercq |
| 2001 | DAC | Analysis of Non-Uniform Temperature-Dependent Interconnect Performance in High Performance ICs. | Amir H. Ajami, Kaustav Banerjee, Massoud Pedram, Lukas P. P. P. van Ginneken |
| 2001 | DAC | Analysis of On-Chip Inductance Effects using a Novel Performance Optimization Methodology for Distributed RLC Interconnects. | Kaustav Banerjee, Amit Mehrotra |
| 2001 | ICCAD | Analysis of Substrate Thermal Gradient Effects on Optimal Buffer Insertion. | Amir H. Ajami, Kaustav Banerjee, Massoud Pedram |
| 2001 | ICCAD | Coupled Analysis of Electromigration Reliability and Performance in ULSI Signal Nets. | Kaustav Banerjee, Amit Mehrotra |
| 2001 | ICCAD | Compact Modeling and SPICE-Based Simulation for Electrothermal Analysis of Multilevel ULSI Interconnects. | TingYen Chiang, Kaustav Banerjee, Krishna Saraswat |
| 2000 | DAC | Multiple Si layer ICs: motivation, performance analysis, and design implications. | Shukri J. Souri, Kaustav Banerjee, Amit Mehrotra, Krishna Saraswat |
| 1999 | DAC | On Thermal Effects in Deep Sub-Micron VLSI Interconnects. | Kaustav Banerjee, Amit Mehrotra, Alberto L. Sangiovanni-Vincentelli, Chenming Hu |