| 2026 | DATE | On Oracle-Guided Random Circuit Learning via Stochastic Boolean Satisfiability. | Shakil Ahmed, Kaveh Shamsi |
| 2026 | VTS | Structural Reconstruction of Analog Circuits Using Graph Neural Networks and Transformers. | Dipali Jain, Guangwei Zhao, Kaveh Shamsi |
| 2025 | ASPDAC | A Hybrid Machine Learning and Numeric Optimization Approach to Analog Circuit Deobfuscation. | Dipali Deepak Jain, Guangwei Zhao, Rajesh Kumar Datta, Kaveh Shamsi |
| 2025 | ITC | Improving Error Tolerance and Scalability in Pseudo-Boolean SAT-based Generic Side-Channel Analysis. | Shakil Ahmed, Dipali Jain, Kaveh Shamsi |
| 2024 | ITC | Towards Machine-Learning-based Oracle-Guided Analog Circuit Deobfuscation. | Dipali Jain, Guangwei Zhao, Rajesh Datta, Kaveh Shamsi |
| 2023 | DATE | TIPLock: Key-Compressed Logic Locking using Through-Input-Programmable Lookup-Tables. | Kaveh Shamsi, Rajesh Kumar Datta |
| 2021 | ICCAD | Circuit Deobfuscation from Power Side-Channels using Pseudo-Boolean SAT. | Kaveh Shamsi, Yier Jin |
| 2019 | DATE | KC2: Key-Condition Crunching for Fast Sequential Circuit Deobfuscation. | Kaveh Shamsi, Meng Li, David Z. Pan, Yier Jin |
| 2019 | ICCAD | IcySAT: Improved SAT-based Attacks on Cyclic Locked Circuits. | Kaveh Shamsi, David Z. Pan, Yier Jin |
| 2018 | ITC | TimingSAT: Decamouflaging Timing-based Logic Obfuscation. | Meng Li, Kaveh Shamsi, Yier Jin, David Z. Pan |
| 2016 | DATE | Leverage Emerging Technologies For DPA-Resilient Block Cipher Design. | Yu Bi, Kaveh Shamsi, Jiann-Shiun Yuan, Franois-Xavier Standaert, Yier Jin |
| 2016 | ICCAD | Provably secure camouflaging strategy for IC protection. | Meng Li, Kaveh Shamsi, Travis Meade, Zheng Zhao, Bei Yu, Yier Jin, David Z. Pan |
| 2016 | ICCD | Voting system design pitfalls: Vulnerability analysis and exploitation of a model platform. | Kelvin Ly, Orlando Arias, Jacob Wurm, Khoa Hoang, Kaveh Shamsi, Yier Jin |
| 2016 | VTS | Security of emerging non-volatile memories: Attacks and defenses. | Kaveh Shamsi, Yier Jin |
| 2015 | ICCD | Reliable and high performance STT-MRAM architectures based on controllable-polarity devices. | Kaveh Shamsi, Yu Bi, Yier Jin, Pierre-Emmanuel Gaillardon, Michael T. Niemier, Xiaobo Sharon Hu |