Kavish Seth
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
1
Active years
2002–2006
Best venue rank
National
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | VLSID | Ultra Folded High-Speed Architectures for Reed-Solomon Decoders. | Kavish Seth, K. N. Viswajith, S. Srinivasan, V. Kamakoti |
| 2004 | VLSID | A Parallel Architectural Implementation Of The New Three-Step Search Algorithm For Block Motion Estimation. | Kavish Seth, P. Rangarajan, S. Srinivasan, V. Kamakoti, V. Bala Kuteshwar |
| 2002 | VLSID | VLSI Implementation of 2-D DWT/IDWT Cores Using 9/7-Tap Filter Banks Based on the Non-Expansive Symmetric Extension Scheme. | Kavish Seth, S. Srinivasan |