Kazuya Masu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
23
Venues
6
Active years
1994–2017
Best venue rank
A*
Where they publish
Papers
23 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2017 | ASPDAC | Design of high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique. | Yosuke Ishikawa, Sho Ikeda, Hiroyuki Ito, Akifumi Kasamatsu, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shinsuke Hara, Ruibing Dong, Shiro Dosho, Noboru Ishihara, Kazuya Masu |
| 2015 | ASPDAC | A 0.5-V 5.8-GHz low-power asymmetrical QPSK/OOK transceiver for wireless sensor network. | Sho Ikeda, Sang-yeop Lee, Shin Yonezawa, Yiming Fang, Motohiro Takayasu, Taisuke Hamada, Yosuke Ishikawa, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu |
| 2015 | ISCAS | A 0.5-V 1.56-mW 5.5-GHz RF transceiver IC module with J-shaped folded monopole antenna. | Yosuke Ishikawa, Sang-yeop Lee, Shin Yonezawa, Sho Ikeda, Yiming Fang, Taisuke Hamada, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu |
| 2014 | ASPDAC | A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor. | Sho Ikeda, Tatsuya Kamimura, Sang-yeop Lee, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu |
| 2014 | ISCAS | An ultra low power pH-monitoring IC with a duty-cycling wireless FM-transmitter. | Yusuke Shiino, Hiroyuki Ito, Taku Fujiwara, Noboru Ishihara, Hisashi Yamanouchi, Hiroki Tanabe, Satoshi Nomura, Toshifumi Konishi, Katsuyuki Machida, Kazuya Masu |
| 2013 | ASPDAC | Challenges in integration of diverse functionalities on CMOS. | Kazuya Masu, Noboru Ishihara, Toshifumi Konishi, Katsuyuki Machida, Hiroshi Toshiyoshi |
| 2010 | ISCAS | Decomposition of drain-current variation into gain-factor and threshold voltage variations. | Takashi Sato, Takumi Uezono, Noriaki Nakayama, Kazuya Masu |
| 2010 | ISCAS | Scan based process parameter estimation through path-delay inequalities. | Takumi Uezono, Tomoyuki Takahashi, Michihiro Shintani, Kazumi Hatayama, Kazuya Masu, Hiroyuki Ochi, Takashi Sato |
| 2010 | VTS | Path clustering for adaptive test. | Takumi Uezono, Tomoyuki Takahashi, Michihiro Shintani, Kazumi Hatayama, Kazuya Masu, Hiroyuki Ochi, Takashi Sato |
| 2008 | ASPDAC | LVDS-type on-chip transmision line interconnect with passive equalizers in 90nm CMOS process. | Akiko Mineyama, Hiroyuki Ito, Takahiro Ishii, Kenichi Okada, Kazuya Masu |
| 2008 | ASPDAC | Small-area CMOS RF distributed mixer using multi-port inductors. | Susumu Sadoshima, Satoshi Fukuda, Tackya Yammouch, Hiroyuki Ito, Kenichi Okada, Kazuya Masu |
| 2008 | ASPDAC | Determination of optimal polynomial regression function to decompose on-die systematic and random variations. | Takashi Sato, Hiroyuki Ueyama, Noriaki Nakayama, Kazuya Masu |
| 2008 | DAC | Non-parametric statistical static timing analysis: an SSTA framework for arbitrary distribution. | Masanori Imai, Takashi Sato, Noriaki Nakayama, Kazuya Masu |
| 2007 | ASPDAC | Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation. | Satoshi Fukuda, D. Kawazoe, Kenichi Okada, Kazuya Masu |
| 2007 | ASPDAC | A Wideband CMOS LC-VCO Using Variable Inductor. | Kazuma Ohashi, Yusaku Ito, Yoshiaki Yoshihara, Kenichi Okada, Kazuya Masu |
| 2007 | ASPDAC | A Multi-Drop Transmission-Line Interconnect in Si LSI. | Junki Seita, Hiroyuki Ito, Kenichi Okada, Takashi Sato, Kazuya Masu |
| 2006 | ISCAS | Reconfigurable CMOS low noise amplifier for self compensation. | D. Kawazoe, Hirotaka Sugawara, Tatsuya Ito, Kenichi Okada, Kazuya Masu |
| 2005 | ASPDAC | Evaluation of on-chip transmission line interconnect using wire length distribution. | Junpei Inoue, Hiroyuki Ito, Shinichiro Gomi, Takanori Kyogoku, Takumi Uezono, Kenichi Okada, Kazuya Masu |
| 2005 | ASPDAC | A dynamic reconfigurable RF circuit architecture. | Kenichi Okada, Yoshiaki Yoshihara, Hirotaka Sugawara, Kazuya Masu |
| 2004 | DATE | ULSI Interconnect Length Distribution Model Considering Core Utilization. | Hidenari Nakashima, Junpei Inoue, Kenichi Okada, Kazuya Masu |
| 2000 | PIMRC | Design and implementation of intracell reverse link using approximately synchronized CDMA. | Suguru Kameda, Kouichi Takahashi, Taketo Kamata, Jae Sang Cha, Hiroyuki Nakase, Kazuya Masu, Kazuo Tsubouchi |
| 2000 | PIMRC | Implementation of low power matched filter LSI for IMT-2000. | Hiroyuki Nakase, Koji Kubota, Suguru Kameda, Kenji Togura, Kazuya Masu, Kazuo Tsubouchi |
| 1994 | PIMRC | One chip demodulator using RF front-end SAW correlator for 2.4 GHz asynchronous spread spectrum modem. | Hiroyuki Nakase, T. Kasai, Y. Nakamura, Kazuya Masu, Kazuo Tsubouchi |