Kazuyasu Fujishima
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
1
Active years
1986–1992
Best venue rank
A
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1992 | ITC | A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter. | Masaki Tsukude, Kazutami Arimoto, Hideto Hidaka, Yasuhiro Konishi, Masanori Hayashikoshi, Katsunori Suma, Kazuyasu Fujishima |
| 1989 | ITC | A New Array Architecture for Parallel Testing in VLSI Memories. | Yoshio Matsuda, Kazutami Arimoto, Masaki Tsukude, Tsukasa Oishi, Kazuyasu Fujishima |
| 1986 | ITC | Redundancy Test for 1 Mbit DRAM Using Multi-Bit-Test Mode. | Yasumasa Nishimura, Mitsuhiro Hamada, Hideto Hidaka, Hideyuki Ozaki, Kazuyasu Fujishima, Y. Hayasaka |