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Lavanya Subramanian

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

13

Venues

10

Active years

2011–2026

Best venue rank

A*

Where they publish

Papers

13 indexed papers, newest first.

YearVenueTitleAuthors
2026CHIPublics, Place, and Sensors: Co-Designing Environmental Monitoring with a Community Orchard.Dana Habeeb, Lavanya Subramanian, Rahul Devajji, Nick Polak
2024ASPLOSSlimSLAM: An Adaptive Runtime for Visual-Inertial Simultaneous Localization and Mapping.Armand Behroozi, Yuxiang Chen, Vlad Fruchter, Lavanya Subramanian, Sriseshan Srikanth, Scott A. Mahlke
2020MICROGenASM: A High-Performance, Low-Power Approximate String Matching Acceleration Framework for Genome Sequence Analysis.Damla Senol Cali, Gurpreet S. Kalsi, Zlal Bingl, Can Firtina, Lavanya Subramanian, Jeremie S. Kim, Rachata Ausavarungnirun, Mohammed Alser, Juan Gmez-Luna, Amirali Boroumand, Anant Nori, Allison Scibisz, Sreenivas Subramoney, Can Alkan, Saugata Ghose, Onur Mutlu
2019EuroSysGrandSLAm: Guaranteeing SLAs for Jobs in Microservices Execution Frameworks.Ram Srivatsa Kannan, Lavanya Subramanian, Ashwin Raju, Jeongseob Ahn, Jason Mars, Lingjia Tang
2018DACClosed yet open DRAM: achieving low latency and high performance in DRAM memory systems.Lavanya Subramanian, Kaushik Vaidyanathan, Anant Nori, Sreenivas Subramoney, Tanay Karnik, Hong Wang
2017SIGMETRICSDesign-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms.Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu
2015MICROThe application slowdown model: quantifying and controlling the impact of inter-application interference at shared caches and main memory.Lavanya Subramanian, Vivek Seshadri, Arnab Ghosh, Samira Manabi Khan, Onur Mutlu
2015VEEA-DRM: Architecture-aware Distributed Resource Management of Virtualized Clusters.Hui Wang, Canturk Isci, Lavanya Subramanian, Jongmoo Choi, Depei Qian, Onur Mutlu
2014ICCDThe Blacklisting Memory Scheduler: Achieving high performance and fairness at low cost.Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, Onur Mutlu
2013HPCATiered-latency DRAM: A low latency and low cost DRAM architecture.Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu
2013HPCAMISE: Providing performance predictability and improving fairness in shared main memory systems.Lavanya Subramanian, Vivek Seshadri, Yoongu Kim, Ben Jaiyen, Onur Mutlu
2012ISCAStaged memory scheduling: Achieving high performance and scalability in heterogeneous systems.Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lavanya Subramanian, Gabriel H. Loh, Onur Mutlu
2011MICROReducing memory interference in multicore systems via application-aware memory channel partitioning.Sai Prashanth Muralidhara, Lavanya Subramanian, Onur Mutlu, Mahmut T. Kandemir, Thomas Moscibroda