| 2022 | ISCAS | Self-correcting Flip-flops for Triple Modular Redundant Logic in a 12-nm Technology. | Lawrence T. Clark, Alen Duvnjak, Clifford Young-Sciortino, Matthew Cannon, John S. Brunhaver, Sapan Agarwal, Jereme Neuendank, Donald Wilson, Hugh J. Barnaby, Matthew J. Marinella |
| 2017 | ICCAD | ASAP7 predictive design kit development and cell design technology co-optimization: Invited paper. | Vinay Vashishtha, Manoj Vangala, Lawrence T. Clark |
| 2017 | ISCAS | Robust 7-nm SRAM design on a predictive PDK. | Vinay Vashishtha, Manoj Vangala, Parv Sharma, Lawrence T. Clark |
| 2015 | ISCAS | Temporal pulse-clocked multi-bit flip-flop mitigating SET and SEU. | Sushil Kumar, Srivatsan Chellappa, Lawrence T. Clark |
| 2015 | ISCAS | Simple and accurate single event charge collection macro modeling for circuit simulation. | Aymeric Privat, Lawrence T. Clark |
| 2015 | ISCAS | Delay and power tradeoffs for static and dynamic register files. | Vinay Vashishtha, Aditya Gujja, Lawrence T. Clark |
| 2013 | ISLPED | SRAM cell optimization for low AVT transistors. | Lawrence T. Clark, Samuel Leshner, George Tien |
| 2011 | ISCAS | Efficient voltage conversion for SRAM low standby power modes. | Lawrence T. Clark, Tai-Hua Chen, Vikas Chaudhary |
| 2011 | ISCAS | Validation of and delay variation in total ionizing dose hardened standard cell libraries. | Lawrence T. Clark, David E. Pettit, Keith E. Holbert, Nathan D. Hindman |
| 2010 | DAC | In-situ characterization and extraction of SRAM variability. | Srivatsan Chellappa, Jia Ni, Xiaoyin Yao, Nathan D. Hindman, Jyothi Velamala, Min Chen, Yu Cao, Lawrence T. Clark |
| 2010 | ISCAS | Fast low power translation lookaside buffers using hierarchical NAND match lines. | Lawrence T. Clark, Vikas Chaudhary |
| 2010 | ISCAS | Fast and scalable priority encoding using static CMOS. | Satendra Kumar Maurya, Lawrence T. Clark |
| 2009 | ISLPED | Low power fast and dense longest prefix match content addressable memory for IP routers. | Satendra Kumar Maurya, Lawrence T. Clark |
| 2007 | VLSID | LCSRAM: A Leakage Controlled Six-transistor Static Random Access Memory Cell with Intrinsically High Read Stability. | Sayeed A. Badrudduza, Giby Samson, Lawrence T. Clark |
| 2005 | DAC | Mapping statistical process variations toward circuit performance variability: an analytical modeling approach. | Yu Cao, Lawrence T. Clark |
| 2005 | ICCD | Robust Design of High Fan-In/Out Subthreshold Circuits. | Jinhui Chen, Lawrence T. Clark, Yu Cao |
| 2004 | ISLPED | Managing standby and active mode leakage power in deep sub-micron design. | Lawrence T. Clark, Rakesh Patel, Timothy S. Beatty |
| 2003 | ISLPED | Reducing translation lookaside buffer active power. | Lawrence T. Clark, Byungwoo Choi, Michael W. Wilkerson |
| 2002 | ISLPED | Standby power management for a 0.18m microprocessor. | Lawrence T. Clark, Neil Deutscher, Shay Demmons, Franco Ricci |