| 2025 | DAC | FLAG: An FPGA-Based System for Low-Latency GNN Inference Service Using Vector Quantization. | Yunki Han, Taehwan Kim, Jiwan Kim, Seohye Ha, Lee-Sup Kim |
| 2025 | ICCAD | SAFF: Scalable Acceleration of GNN-based Machine Learning Force Fields using Tensor-Aware Hardware for Molecular Simulation. | Seohye Ha, Yunki Han, Taehwan Kim, Jiwan Kim, Junyoung Park, Gunhee Park, Lee-Sup Kim |
| 2025 | ISCA | EOD: Enabling Low Latency GNN Inference via Near-Memory Concatenate Aggregation. | Taehwan Kim, Yunki Han, Seohye Ha, Jiwan Kim, Lee-Sup Kim |
| 2024 | DAC | Token-Picker: Accelerating Attention in Text Generation with Minimized Memory Transfer via Probability Estimation. | Junyoung Park, Myeonggu Kang, Yunki Han, Yanggon Kim, Jaekang Shin, Lee-Sup Kim |
| 2024 | ICCAD | CoCoA: Algorithm-Hardware Co-Design for Large-Scale GNN Training using Compressed Graph. | Yunki Han, Jaekang Shin, Gunhee Park, Lee-Sup Kim |
| 2023 | HPCA | OptimStore: In-Storage Optimization of Large Scale DNNs with On-Die Processing. | Junkyum Kim, Myeonggu Kang, Yunki Han, Yang-gon Kim, Lee-Sup Kim |
| 2022 | DAC | Algorithm/architecture co-design for energy-efficient acceleration of multi-task DNN. | Jaekang Shin, Seungkyu Choi, Jongwoo Ra, Lee-Sup Kim |
| 2022 | ICCAD | Re | Hyein Shin, Myeonggu Kang, Lee-Sup Kim |
| 2021 | DAC | Fault-free: A Fault-resilient Deep Neural Network Accelerator based on Realistic ReRAM Devices. | Hyein Shin, Myeonggu Kang, Lee-Sup Kim |
| 2021 | DAC | Optimizing ADC Utilization through Value-Aware Bypass in ReRAM-based DNN Accelerator. | HanCheon Yun, Hyein Shin, Myeonggu Kang, Lee-Sup Kim |
| 2021 | ICCAD | A Convergence Monitoring Method for DNN Training of On-Device Task Adaptation. | Seungkyu Choi, Jaekang Shin, Lee-Sup Kim |
| 2021 | ICCAD | A Framework for Area-efficient Multi-task BERT Execution on ReRAM-based Accelerators. | Myeonggu Kang, Hyein Shin, Jaekang Shin, Lee-Sup Kim |
| 2021 | ICCAD | Deferred Dropout: An Algorithm-Hardware Co-Design DNN Training Method Provisioning Consistent High Activation Sparsity. | Kangkyu Park, Yunki Han, Lee-Sup Kim |
| 2020 | DAC | A Pragmatic Approach to On-device Incremental Learning System with Selective Weight Updates. | Jaekang Shin, Seungkyu Choi, Yeongjae Choi, Lee-Sup Kim |
| 2020 | ICCAD | A Thermal-aware Optimization Framework for ReRAM-based Deep Neural Network Acceleration. | Hyein Shin, Myeonggu Kang, Lee-Sup Kim |
| 2019 | DAC | An Optimized Design Technique of Low-bit Neural Network Training for Personalization on IoT Devices. | Seungkyu Choi, Jaekang Shin, Yeongjae Choi, Lee-Sup Kim |
| 2019 | HPCA | NAND-Net: Minimizing Computational Complexity of In-Memory Processing for Binary Neural Networks. | Hyeonuk Kim, Jaehyeong Sim, Yeongjae Choi, Lee-Sup Kim |
| 2019 | ICCAD | eSRCNN: A Framework for Optimizing Super-Resolution Tasks on Diverse Embedded CNN Accelerators. | Youngbeom Jung, Yeongjae Choi, Jaehyeong Sim, Lee-Sup Kim |
| 2019 | ICCAD | An Energy-efficient Processing-in-memory Architecture for Long Short Term Memory in Spin Orbit Torque MRAM. | Kyeonghan Kim, Hyein Shin, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim |
| 2019 | ICCAD | A PVT-robust Customized 4T Embedded DRAM Cell Array for Accelerating Binary Neural Networks. | Hyein Shin, Jaehyeong Sim, Daewoong Lee, Lee-Sup Kim |
| 2019 | ISLPED | Compressing Sparse Ternary Weight Convolutional Neural Networks for Efficient Hardware Acceleration. | Hyeonwook Wi, Hyeonuk Kim, Seungkyu Choi, Lee-Sup Kim |
| 2018 | ICCAD | NID: processing binary convolutional neural network in commodity DRAM. | Jaehyeong Sim, Hoseok Seol, Lee-Sup Kim |
| 2018 | ISLPED | TrainWare: A Memory Optimized Weight Update Architecture for On-Device Convolutional Neural Network Training. | Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim |
| 2017 | DAC | A Kernel Decomposition Architecture for Binary-weight Convolutional Neural Networks. | Hyeonuk Kim, Jaehyeong Sim, Yeongjae Choi, Lee-Sup Kim |
| 2017 | ISLPED | SENIN: An energy-efficient sparse neuromorphic system with on-chip learning. | Myung-Hoon Choi, Seungkyu Choi, Jaehyeong Sim, Lee-Sup Kim |
| 2017 | WACV | Hardware-Centric Vision Processing for Mobile IoT Environment Exploiting Approximate Graph Cut in Resistor Grid. | Yeongjae Choi, Jun-Seok Park, Lee-Sup Kim |
| 2016 | ISCA | Energy Efficient Data Encoding in DRAM Channels Exploiting Data Value Similarity. | Hoseok Seol, Wongyu Shin, Jaemin Jang, Jungwhan Choi, Jinwoong Suh, Lee-Sup Kim |
| 2016 | ISCAS | Crosstalk avoidance code for direct pass-through architecture. | Minhye Kim, Soochang Chae, Young-Ju Kim, Seung-Jun Bae, Lee-Sup Kim |
| 2015 | ISCA | Multiple clone row DRAM: a low latency and area optimized DRAM. | Jungwhan Choi, Wongyu Shin, Jaemin Jang, Jinwoong Suh, Yongkee Kwon, Youngsuk Moon, Lee-Sup Kim |
| 2015 | ISCAS | An integrated time register and arithmetic circuit with combined operation for time-domain signal processing. | Daewoong Lee, Dongil Lee, Taeho Lee, Yong-Hun Kim, Lee-Sup Kim |
| 2014 | HPCA | NUAT: A non-uniform access time memory controller. | Wongyu Shin, Jeongmin Yang, Jungwhan Choi, Lee-Sup Kim |
| 2014 | ICCD | Timing error masking by exploiting operand value locality in SIMD architecture. | Jaehyeong Sim, Jun-Seok Park, Seungwook Paek, Lee-Sup Kim |
| 2014 | ISCAS | An area-efficient on-chip temperature sensor with nonlinearity compensation using injection-locked oscillator (ILO). | Wongyu Shin, Seungwook Paek, Lee-Sup Kim |
| 2013 | ISCAS | A 7 mW 2.5 GHz spread spectrum clock generator using switch-controlled injection-locked oscillator. | Jeongmin Yang, Young-Ju Kim, Lee-Sup Kim |
| 2012 | DAC | PowerField: a transient temperature-to-power technique based on Markov random field theory. | Seungwook Paek, Seok-Hwan Moon, Wongyu Shin, Jaehyeong Sim, Lee-Sup Kim |
| 2012 | ISCAS | A 20 Gbps 1-tap decision feedback equalizer with unfixed tap coefficient. | Yong-Hun Kim, Lee-Sup Kim |
| 2011 | ISCAS | A 5.4 Gb/s clock and data recovery circuit using the seamless loop transition scheme without phase noise degradation. | Won-Young Lee, Lee-Sup Kim |
| 2011 | ISCAS | Area-efficient dynamic thermal management unit using MDLL with shared DLL scheme for many-core processors. | Seungwook Paek, Jiehwan Oh, Sang-Hye Chung, Lee-Sup Kim |
| 2010 | ISCAS | A high resolution metastability-independent two-step gated ring oscillator TDC with enhanced noise shaping. | Sang-Hye Chung, Kyu-Dong Hwang, Won-Young Lee, Lee-Sup Kim |
| 2010 | ISCAS | An area efficient asynchronous gated ring oscillator TDC with minimum GRO stages. | Kyu-Dong Hwang, Lee-Sup Kim |
| 2009 | ISCAS | Bank-partition and Multi-fetch Scheme for Floating-point Special Function units in Multi-core Systems. | Young-Jun Kim, Kyusik Chung, Lee-Sup Kim, Seong Mo Park |
| 2009 | ISCAS | A Spread Spectrum Clock Generator with Spread Ratio Error Reduction Scheme for DisplayPort Main Link. | Won-Young Lee, Lee-Sup Kim |
| 2008 | ISCAS | High speed serial interface for mobile LCD driver IC. | Hyun-Kyu Jeon, Hye-Ran Kim, Jung-Min Choi, Ju-Pyo Hong, Yong-Suk Kim, Hyung-Seog Oh, Dae-Keun Han, Lee-Sup Kim |
| 2008 | ISCAS | Clipping-ratio-independent 3D graphics clipping engine by dual-thread algorithm. | Jeong-Hyun Kim, Kyusik Chung, Young-Jun Kim, Seok-Hoon Kim, Lee-Sup Kim |
| 2007 | ISCAS | Triangle-Level Depth Filter Method for Bandwidth Reduction in 3D Graphics Hardware. | Jae-Sung Yoon, Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim |
| 2006 | ISCAS | An efficient texture cache for programmable vertex shaders. | Seunghyun Cho, Chang-Hyo Yu, Lee-Sup Kim |
| 2006 | ISCAS | Vertex cache of programmable geometry processor for mobile multimedia application. | Kyusik Chung, Chang-Hyo Yu, Lee-Sup Kim |
| 2006 | ISCAS | Charge-pump reducing current mismatch in DLLs and PLLs. | Kyung-Soo Ha, Lee-Sup Kim |
| 2006 | ISCAS | A 0.18m CMOS 10Gb/s 1: 4 DEMUX using replica-bias circuits for optical receiver. | Ju-Pyo Hong, Kyung-Soo Ha, Lee-Sup Kim |
| 2006 | ISCAS | A low power SoC bus with low-leakage and low-swing technique. | Kwang-Il Oh, Seunghyun Cho, Lee-Sup Kim |
| 2005 | ISCAS | An 11M-triangles/sec 3D graphics clipping engine for triangle primitives. | Jaewan Bae, Donghyun Kim, Lee-Sup Kim |
| 2005 | ISCAS | A 3-way SIMD engine for programmable triangle setup in embedded 3D graphics hardware. | Kyusik Chung, Donghyun Kim, Lee-Sup Kim |
| 2005 | ISCAS | A 33.2M vertices/sec programmable geometry engine for multimedia embedded systems. | Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim |
| 2004 | ICCD | Adaptive Selection of an Index in a Texture Cache. | Chun-Ho Kim, Lee-Sup Kim |
| 2004 | ISCAS | Division-free rasterizer for perspective-correct texture filtering. | Donghyun Kim, Lee-Sup Kim |
| 2004 | ISCAS | A high performance low power dynamic PLA with conditional evaluation scheme. | Kwang-Il Oh, Lee-Sup Kim |
| 2004 | ISCAS | An error pattern ROM compression method for continuous data. | Byung-Do Yang, Lee-Sup Kim |
| 2004 | ISCAS | An adaptive spatial filter for early depth test. | Chang-Hyo Yu, Lee-Sup Kim |
| 2003 | ISCAS | A PN triangle generation unit for fast and simple tessellation hardware. | Kyusik Chung, Lee-Sup Kim |
| 2003 | ISCAS | A hardware-like high-level language based environment for 3D graphics architecture exploration. | Inho Lee, Joung-Youn Kim, Yeon-Ho Im, Yunseok Choi, Hyunchul Shin, Chang-Young Han, Donghyun Kim, Hyoungjoon Park, Young-Il Seo, Kyusik Chung, Chang-Hyo Yu, Kanghyup Chun, Lee-Sup Kim |
| 2003 | ISCAS | A low power charge sharing ROM using dummy bit lines. | Byung-Do Yang, Lee-Sup Kim |
| 2003 | ISCAS | A hierarchical depth buffer for minimizing memory bandwidth in 3D rendering engine: Depth Filter. | Chang-Hyo Yu, Lee-Sup Kim |
| 2003 | ISLPED | A clock delayed sleep mode domino logic for wide dynamic OR gate. | Kwang-Il Oh, Lee-Sup Kim |
| 2002 | ISCAS | A 1.67 GHz 32-bit pipelined carry-select adder using the complementary scheme. | Youngjoon Kim, Ki-Hyuk Sung, Lee-Sup Kim |
| 2002 | ISCAS | A high speed direct digital frequency synthesizer using a low power pipelined parallel accumulator. | Byung-Do Yang, Lee-Sup Kim, Hyun-Kyu Yu |
| 2001 | ISCAS | Design trade-off in merged DRAM logic for video signal processing. | Sunho Chang, Lee-Sup Kim |
| 2001 | ISCAS | A low power carry select adder with reduced area. | Youngjoon Kim, Lee-Sup Kim |
| 2001 | ISCAS | A high-speed pattern decoder in MPEG-4 padding block hardware accelerator. | Hyeon-Cheol Mo, Jong-Sun Kim, Lee-Sup Kim |
| 2001 | ISCAS | A low power charge-recycling ROM architecture. | Byung-Do Yang, Lee-Sup Kim |
| 2000 | DATE | A Memory Architecture with 4-Address Configurations for Video Signal Processing. | Sunho Chang, Jong-Sun Kim, Lee-Sup Kim |
| 2000 | ISCAS | An advanced contrast enhancement using partially overlapped sub-block histogram equalization. | Joung-Youn Kim, Lee-Sup Kim, Seung-Ho Hwang |
| 1998 | ICCD | A minimized hardware architecture of fast Phong shader using Taylor series approximation in 3D graphics. | Hyunchul Shin, Jin-Aeon Lee, Lee-Sup Kim |
| 1997 | ISLPED | A new 4-2 adder and booth selector for low power MAC unit. | Bum-Sik Kim, Dae-Hyum Chung, Lee-Sup Kim |